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Low Temperature Copper-Nanorod Bonding for 3D Integration

Published online by Cambridge University Press:  26 February 2011

Pei-I Wang
Affiliation:
wangp3@rpi.edu, Rensselaer Polytechnic Institute, Center of Integrated Electronics, CII 6015 110 8th street, Troy, NY, 12180, United States
Tansel Karabacak
Affiliation:
txkarabacak@ualr.edu, University of Arkansas at Little Rock, Now with Department of Applied Science, Little Rock, AR, 72204, United States
Jian Yu
Affiliation:
yuj@us.ibm.com, Now with IBM, Fishkill, NY, 12524, United States
Hui-Feng Li
Affiliation:
hf_li@yahoo.com, Now with Freescale Semiconductor, Austin, TX, 78729, United States
Gopal G. Pethuraja
Affiliation:
pethug@rpi.edu, Rensselaer Polytechnic Institute, Center of Integrated Electronics, Troy, NY, 12180, United States
Sang Hwui Lee
Affiliation:
lees@rpi.edu, Rensselaer Polytechnic Institute, Center of Integrated Electronics, Troy, NY, 12180, United States
Michael Z. Liu
Affiliation:
liuz2@rpi.edu, Rensselaer Polytechnic Institute, Center of Integrated Electronics, Troy, NY, 12180, United States
J.-Q. Lu
Affiliation:
luj@rpi.edu, Rensselaer Polytechnic Institute, Center of Integrated Electronics, Troy, NY, 12180, United States
T.-M. Lu
Affiliation:
lut@rpi.edu, Rensselaer Polytechnic Institute, Center of Integrated Electronics, Troy, NY, 12180, United States
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Abstract

Wafer bonding is an emerging technology for fabrication of complex three-dimensional (3D) structures; particularly it enables monolithic wafer-level 3D integration of high performance, multi-function microelectronic systems. For such a 3D integrated circuits, low-temperature wafer bonding is required to be compatible with the back-end-of-the-line processing conditions. Recently our investigation on surface melting characteristics of copper nanorod arrays showed that the threshold of the morphological changes of the nano-rod arrays occurs at a temperature significantly below the copper bulk melting point. With this unique property of the copper nanorod arrays, wafer bonding using copper nanorod arrays as a bonding intermediate layer was investigated at low temperatures (400 °C and lower). 200 mm Wafers, each with a copper nanorod array layer, were bonded at 200 – 400 °C and with a bonding down-force of 10 kN in a vacuum chamber. Bonding results were evaluated by razor blade test, mechanical grinding and polishing, and cross-section imaging using a focus ion beam/scanning electron microscope (FIB/SEM). The FIB/SEM images show that the copper nanorod arrays fused together accompanying by a grain growth at a bonding temperature of as low as 200 °C. A dense copper bonding layer was achieved at 400 °C where copper grains grew throughout the copper structure and the original bonding interface was eliminated. The sintering of such nanostructures depends not only on their feature size, but also significantly influenced by the bonding pressure. These two factors both contribute to the mass transport in the nanostructure, leading to the formation of a dense bonding layer.

Type
Research Article
Copyright
Copyright © Materials Research Society 2007

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References

REFERENCES

1. Voldman, J., Gary, M. L., and Schmidt, M. A., Annu. Rev. Biomed. Eng., 1, 401 (1999).Google Scholar
2. Niklaus, F., Lu, J.-Q., Stemme, G., and Gutmann, R., J. of Appl. Phys. (Applied Physics Review – Focused Review), 99 (3), 031101 (2006).Google Scholar
3. Pitera, A. J., Taraschi, G., Lee, M. L., Leitz, C. W., Cheng, Z.-Y., and Fitzgerald, E. A., Journal of The Electrochemical Society, 151 (7), G443 (2004).Google Scholar
4. Murai, A., Thompson, D. B., Masui, H., Fellows, N., Mishra, U. K., Nakamura, S., and DenBaars, S. P., Appl. Phys. Lett., 89, 171116 (2006).Google Scholar
5. Lu, J.-Q., Cale, T.S. and Gutmann, R.J., in Dielectrics for Nanosystems: Materials, Science, Processing, Reliability, and Manufacturing, ECS PV 2004–04, pp. 312323 (2004).Google Scholar
6. Chen, K. N., Tan, C. S., Fan, A., and Reif, R., Electrochemical and Solid-State Letters, 7 (1), G14 (2004).Google Scholar
7. Chen, K.-N., Lee, S.H., Andry, P.S., Tsang, C.K., Topol, A.W., Lin, Y.-M., Lu, J.-Q., Young, A.M., Ieong, M., and Haensch, W., 2006 IEEE International Electron Devices Meeting (IEDM 2006), in press.Google Scholar
8. Karabacak, T., Deluca, J. S., Wang, P.-I., Eyck, G. A. Ten, Ye, D., Wang, G.-C, a nf Lu, T.-M.. Journal of Applied Physics, 99, 064304 (2006).Google Scholar
9. German, R. M., Power Metallurgy Science, Metal Powder Industries Federation, NJ, (1989).Google Scholar
10. Liu, J., Cardamone, A. L., and German, R. M., Power Metallurgy, 44 (4), 317 (2001).Google Scholar