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Methods And Needs For Low K Material Research

Published online by Cambridge University Press:  15 February 2011

Chiu H. Ting  and
Thomas E. Seidel
Chiu H. Ting
Affiliation:
SEMATECH 2706 Montopolis Dr. Austin, TX 78741 On assignment from Intel Corp.
Thomas E. Seidel
Affiliation:
SEMATECH 2706 Montopolis Dr. Austin, TX 78741 Chief Technologist and Director of Strategic Technology
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Abstract

For several years the industry has recognized the need of developing low k dielectric material and high conductivity metal for high performance interconnect. Low k dielectric will impact both power and delay favorably, while higher conductivity metal will reduce delay time. In order to be useful, new low k dielectric materials must be carefully characterized for their electrical, chemical, thermal and mechanical properties. In addition, their impact on process integration, fabrication cost and device reliability must also be considered. Since the gestation period for introducing a new material is very long, a set of standard testing methodologies are required to speed up the development process. This review will discuss various material options and the progress of material development and characterization methodologies. Example results will be provided for assessing these parameters.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 381: Symposium F – Low-Dielectric Constant Materials--Synthesis and Applications in Micro. , 1995 , 3
Copyright
Copyright © Materials Research Society 1995

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References

1. Semiconductor Industry Association, The National Technology Roadmap for Semiconductors, 1994 Google Scholar
2. Pai, P.L. and Ting, C.H., Proc. IEEE VMIC Conf., 258 (1989).Google Scholar
3. Ida, J. et. al., Digest of Symposium on VLSI Technology, 59 (1994).Google Scholar
4. Meindl, J., Georgia Institute of Technology, privite communication.Google Scholar
5. Zhao, B., et. al, SEMATECH internal report (1995).Google Scholar
6. Ting, C.H., et al., Advance Metallization for ULSI Applications, 517 (1994).Google Scholar
7. Ting, C.H., et al., Advanced Metallization for ULSI Applications, 49 (1994).Google Scholar
8. Paraszczak, J., et al., IEDM Tech, Digest, 261 (1993).Google Scholar
9. Cost of Ownership Model, SEMATECH report 91020473B-GEN, (1992).Google Scholar
10. Ting, C.H., in Handbook of Multilevel Metallization for Integrated Circuits edited by Wilson, S.R., et. al. (Noyes Publications, New Jersey, 1993)Google Scholar
11. Homma, T. and Murao, Y., Proc. VMIC Conf., 71 (1993).Google Scholar
12. Matsuda, T., et.al., Proc. of Dielectric VMIC Conf. 22 (1995).Google Scholar
13. Fukuda, T. et. al., Ext. Abst. of ISSDM, 158 (1993).Google Scholar
14. Nishimoto, Y. et.al., Proc. of Dielectric VMIC, 15 (1995).Google Scholar
15. Beach, W. F. and Austin, T.M., Proc. of IEPS, 190 (1988).Google Scholar
16. Jeng, S.P., et.al., Digest of Symposium on VLSI Technology, 73 (1994).Google Scholar
17. Larson, R.A., IBM J. Res. Dev., 26, 268 (1980).Google Scholar
18. Geffken, R.M., IEDM Tech. Digest, 542 (1983).Google Scholar
19. Mukai, K., et.al., IEEE J. of Solid State Circuits, SC–13, 462 (1978).Google Scholar
20. Nishida, T., et.al., IEEE IRPS 148 (1985).Google Scholar
21. Ting, C.H., et.al., Semiconductor International, p.32, Feb. (1985).Google Scholar
22. Eggers, H. et. al., Proc. IEEE VMIC Conf., 163 (1985).Google Scholar
23. Ting, C.H., et al., Advanced Metallization for ULSI Applications 351 (1994).Google Scholar
24. Leu, J. et.al., This conference.Google Scholar
25. Shacham-Diamand, Y., et al., Cornell University, privite communication.Google Scholar
26. Ip, F. and Ting, C.H., This Conference.Google Scholar
27. Interconnect reliability testchip-1 (IRTC-1), SEMATECH internal report (1995).Google Scholar