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A physically-based SPICE model for the leakage current in a-Si:H TFTs accounting for its dependencies on process, geometrical, and bias conditions

Published online by Cambridge University Press:  17 March 2011

Peyman Servati
Affiliation:
Department of Electrical & Computer Engineering, University of Waterloo, Waterloo, Ontario, CanadaN2L 3G1
Arokia Nathan
Affiliation:
Department of Electrical & Computer Engineering, University of Waterloo, Waterloo, Ontario, CanadaN2L 3G1
Andrei Sazonov
Affiliation:
Department of Electrical & Computer Engineering, University of Waterloo, Waterloo, Ontario, CanadaN2L 3G1
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Abstract

We have developed a physically-based analytical model of the static current-voltage characteristics of hydrogenated amorphous silicon (a-Si:H) inverted staggered thin film transistors (TFTs) in the reverse (leakage) regime (VG<0,VD>0). We studied analytically (based on measurement data) the dependence of the leakage current on process parameters (i.e. the deposition-temperature-dependent phosphorus diffusion profile in the a-Si:H active layer), geometrical parameters (i.e. a-Si:H thickness, source/drain overlap areas), and operating conditions (i.e. VG, VD). The derived analytical model is implemented in HSPICE. The simulated and measured results are in good agreement with a discrepancy of less than 5%.

Type
Research Article
Copyright
Copyright © Materials Research Society 2000

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References

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