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Preparation and Use of Chip Capacitors in Ultra-Dense Multi-Chip Modules

Published online by Cambridge University Press:  01 February 2011

D. Pryputniewicz
Affiliation:
Electronics Packaging and Prototyping Division, The Charles Stark Draper Laboratory, Inc., Cambridge, MA 02139
C. Kondoleon
Affiliation:
Electronics Packaging and Prototyping Division, The Charles Stark Draper Laboratory, Inc., Cambridge, MA 02139
J. Haley
Affiliation:
Electronics Packaging and Prototyping Division, The Charles Stark Draper Laboratory, Inc., Cambridge, MA 02139
T. Marinis
Affiliation:
Electronics Packaging and Prototyping Division, The Charles Stark Draper Laboratory, Inc., Cambridge, MA 02139
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Abstract

Draper Laboratory designs and produces ultra-dense multi-chip modules that achieve an integration density, which is only exceeded by that of custom ASIC chips. These modules are fabricated by tiling an adhesive coated substrate with bare integrated circuit chips and passive components that are thinned to 150 microns thick. Multiple layers of thin film copper conductors, supported on Kapton film dielectric, are used to route signals between these components. Connections to their I/O pads and between signal layers are made through laser drilled vias, which are copper plated. The various types of capacitors used in modules for RF applications present several fabrication challenges. In comparison to active IC devices, capacitors have wider dimensional tolerances, are more easily damaged by mechanical handling, and are more susceptible to damage during laser drilling of vias. This paper will discuss these issues and the approaches that have been taken to address them.

Type
Research Article
Copyright
Copyright © Materials Research Society 2004

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References

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