- Cited by 11
Agarwal, Avinash Freiler, Michael Lysaght, Pat Perrymore, Loyd Bergmann, Renate Sparks, Chris Bowers, Bill Barnett, Joel Riley, Deborah Kim, Yudong Nguyen, Billy Bersuker, Gennadi Shero, Eric Lim, Jae E. Lin, Steven Chen, Jerry Murto, Robert W. and Huff, Howard R. 2001. Challenges in Integrating the High-K Gate Dielectric Film to the Conventional Cmos Process Flow. MRS Proceedings, Vol. 670, Issue. ,
Jeon, T. S. White, J. M. and Kwong, D. L. 2001. Thermal stability of ultrathin ZrO2 films prepared by chemical vapor deposition on Si(100). Applied Physics Letters, Vol. 78, Issue. 3, p. 368.
Huff, H.R. Agarwal, A. Kim, Y. Perrymore, L. Riley, D. Barnett, J. Sparks, C. Freiler, M. Gebara, G. Bowers, B. Chen, P.J. Lysaght, P. Nguyen, B. Lim, J.E. Lim, S. Bersuker, G. Zeitzoff, P. Brown, G.A. Young, C. Foran, B. Shaapur, F. Hou, A. Lim, C. Alshareef, H. Borthakur, S. Derro, D.J. Bergmann, R. Larson, L.A. Gardner, M.I. Gutt, J. Murto, R.W. Torres, K. and Jackson, M.D. 2001. Integration of high-k gate stack systems into planar CMOS process flows. p. 2.
Lai, Yi-Sheng Chen, Kuan-Jen and Chen, J. S. 2002. Effects of Plasma Prenitridation and Postdeposition Annealing on the Structural and Dielectric Characteristics of the Ta[sub 2]O[sub 5]/Si System. Journal of The Electrochemical Society, Vol. 149, Issue. 7, p. F63.
Krug, C. and Baumvol, I.J.R. 2002. Non-Crystalline Films for Device Structures. Vol. 29, Issue. , p. 1.
Huff, H.R. Hou, A. Lim, C. Kim, Y. Barnett, J. Bersuker, G. Brown, G.A. Young, C.D. Zeitzoff, P.M. Gutt, J. Lysaght, P. Gardner, M.I. and Murto, R.W. 2003. High-k gate stacks for planar, scaled CMOS integrated circuits. Microelectronic Engineering, Vol. 69, Issue. 2-4, p. 152.
Paskaleva, A. Bauer, A. J. and Lemberger, M. 2005. An asymmetry of conduction mechanisms and charge trapping in thin high-k HfxTiySizO films. Journal of Applied Physics, Vol. 98, Issue. 5, p. 053707.
Paskaleva, A Atanassova, E and Georgieva, M 2005. Charge trapping and conduction mechanisms in Ta2O5on nitrided silicon. Journal of Physics D: Applied Physics, Vol. 38, Issue. 23, p. 4210.
Novkovski, N Paskaleva, A and Atanassova, E 2005. Dielectric properties of rf sputtered Ta2O5on rapid thermally nitrided Si. Semiconductor Science and Technology, Vol. 20, Issue. 2, p. 233.
Paskaleva, A and Atanassova, E 2006. Beneficial effect of post-metallization H2annealing on Ta2O5stack capacitors. Journal of Physics D: Applied Physics, Vol. 39, Issue. 14, p. 2950.
Hembram, K.P.S.S. Dutta, Gargi Waghmare, Umesh V. and Mohan Rao, G. 2007. Electrical and structural properties of zirconia thin films prepared by reactive magnetron sputtering. Physica B: Condensed Matter, Vol. 399, Issue. 1, p. 21.
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A design-of-experiments methodology was implemented to assess the commercial equipment viability to fabricate the high-K dielectrics Ta2O5, TiO2 and BST (70/30 and 50/50 compositions) for use as gate dielectrics. The high-K dielectrics were annealed in 100% or 10% O2 for different times and temperatures in conjunction with a previously prepared NH3 nitrided or 14N implanted silicon surface. Five metal electrode configurations—Ta, TaN, W, WN and TiN—were concurrently examined. Three additional silicon surface configurations were explored in conjunction with a more in-depth set of time and temperature anneals for Ta2O5. Electrical characterization of capacitors fabricated with the above high-K gate dielectrics, as well as SIMS and TEM analysis, indicate that the post high-K deposition annealing temperature was the most significant variable impacting the leakage current density, although there was minimal influence on the capacitance. Further studies are required, however, to clarify the physical mechanisms underlying the electrical data presented.
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