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Properties of 4H-SiC by Sublimation Close Space Technique

Published online by Cambridge University Press:  10 February 2011

S. Nishino ,
K. Matsumoto ,
Y. Chen  and
Y. Nishio
S. Nishino
Affiliation:
Department of Electronics and Information Science Faculty of Engineering and Design, Kyoto Institute of Technology Matsugasaki, Sakyo-ku, Kyoto 606–8585, Japan
K. Matsumoto
Affiliation:
Department of Electronics and Information Science Faculty of Engineering and Design, Kyoto Institute of Technology Matsugasaki, Sakyo-ku, Kyoto 606–8585, Japan
Y. Chen
Affiliation:
Department of Electronics and Information Science Faculty of Engineering and Design, Kyoto Institute of Technology Matsugasaki, Sakyo-ku, Kyoto 606–8585, Japan
Y. Nishio
Affiliation:
Department of Electronics and Information Science Faculty of Engineering and Design, Kyoto Institute of Technology Matsugasaki, Sakyo-ku, Kyoto 606–8585, Japan
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Abstract

SiC is suitable for power devices but high quality SiC epitaxial layers having a high breakdown voltage are needed and thick epilayer is indispensable. In this study, CST method (Close Space Technique) was used to rapidly grow thick epitaxial layers. Source material used was 3C-SiC polycrystalline plate of high purity while 4H-SiC(0001) crystals inclined 8° off toward <1120> was used for the substrate. Quality of the epilayer was influenced significantly by pressure during growth and polarity of the substrate. A p-type conduction was obtained by changing the size of p-type source material. The carrier concentration of epilayer decreased when a lower pressure was employed. Schottky diode was also fabricated.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 572: Symposium Y – Wide-Bandgap Semiconductors for High-Power, High Frequency… , 1999 , 179
Copyright
Copyright © Materials Research Society 1999

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References

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