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Schottky-barrier height tuning using dopant segregation in Schottky-barrier MOSFETs on fully-depleted SOI

Published online by Cambridge University Press:  01 February 2011

Joachim Knoch ,
Min Zhang ,
Qing-Tai Zhao  and
Siegfried Mantl
Joachim Knoch
Affiliation:
j.knoch@fz-juelich.de, Research Center Juelich, Institute of Thin Films and Interaces, ISG1, Leo-Brandt Strasse, Juelich, N/A, D-52425, Germany, +49-2461-614207
Min Zhang
Affiliation:
m.zhang@fz-juelich.de, Research Center Juelich, Institute of Thin Films and Interfaces, ISG1, Juelich, N/A, D-52425, Germany
Qing-Tai Zhao
Affiliation:
q.zhao@fz-juelich.de, Research Center Juelich, Institute of Thin Films and Interfaces, ISG1, Juelich, N/A, D-52425, Germany
Siegfried Mantl
Affiliation:
s.mantl@fz-juelich.de, Research Center Juelich, Institute of Thin Films and Interfaces, ISG1, Juelich, N/A, D-52425, Germany
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Abstract

In this paper we demonstrate the use of dopant segregation during silicidation for decreasing the effective potential barrier height in Schottky-barrier metal-oxide-semiconductor field-effect-transistors (SB-MOSFETs). N-type as well as p-type devices are fabricated with arsenic/boron implanted into the device's source and drain regions prior to silicidation. During full nickel silicidation a highly doped interface layer is created due to dopants segregating at the silicide-silicon interface. This doped layer leads to an increased tunneling probability through the Schottky barrier and hence leads to significantly improved device characteristics. In addition, we show with simulations that employing ultrathin body (UTB) silicon-on-insulator and ultrathin gate oxides allows to further improve the device characteristics.

Keywords

microelectronicsdevicesSi
Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 913: Symposium D – Transistor Scaling – Methods, Materials and Modeling , 2006 , 0913-D01-07
Copyright
Copyright © Materials Research Society 2006

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