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Self-Aligned Solution-Processed Zinc-Tin Oxide Thin-Film Transistors with High-K Solution-Processed Gate Dielectric

Published online by Cambridge University Press:  17 April 2019

Chen-Guan Lee ,
Soumya Dutta  and
Ananth Dodabalapur
Chen-Guan Lee
Affiliation:
Microelectronics Research Center, University of Texas at Austin, Austin, TX 78758, USA
Soumya Dutta
Affiliation:
Microelectronics Research Center, University of Texas at Austin, Austin, TX 78758, USA
Ananth Dodabalapur
Affiliation:
Microelectronics Research Center, University of Texas at Austin, Austin, TX 78758, USA
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Abstract

We demonstrate high performance zinc-tin oxide (ZTO) thin-film transistors (TFTs) with low operation voltage, small channel length and low parasitic capacitance. Both the zinc tin oxide and the high-k dielectric, ZrO2, were solution processed by sol-gel methods. A self-aligned process was employed to minimize the parasitic capacitance. The transistors with a channel length of 8 μm operate at 5 V and have a saturation mobility of 2.5 cm2/V·s and an on/off ratio of 5.9×106. Gate-induced surface relief has been found to have strong effect on the performance of the active layer.

Keywords

sol-gelelectronic materialelectrical properties

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