Vertical DMOSFET devices with sizes from single cell to 3x3 mm2 large devices have been fabricated on cubic 3C-SiC material. The used 3C-SiC substrates had varying material quality. The best quality had a more than 2 orders of magnitude lower density of extended crystal defects than the worst material. The processed and investigated vertical DMOSFET devices were designed for 600 V blocking voltage and had hexagonal unit cells with 2 μm channel length and aluminum implanted termination rings. The p-body was aluminum implanted and the source was phosphorus implanted. As deposited Ti/W contacts were evaluated as source and drain metallization. Single cell vertical DMOSFET devices, processed on the low defect density material quality, gave voltage blocking capabilities of more than 600 V with leakage currents of 0.1 to 10 μA. The same devices could handle currents around 5 mA in on-state at 15 V gate bias. MOSFET devices with 50 to 100 unit cells had blocking voltages of 400 to 500 V with on-state currents of 0.2 to 0.4 A at 15 V gate bias, indicating the potential of 3C-SiC for the fabrication of next generation power MOSFET devices.