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10 - Fundamentals of sampled-data circuits

Published online by Cambridge University Press:  17 December 2010

Márcio Cherem Schneider  and
Carlos Galup-Montoro
Márcio Cherem Schneider
Affiliation:
Universidade Federal de Santa Catarina, Brazil
Carlos Galup-Montoro
Affiliation:
Universidade Federal de Santa Catarina, Brazil
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Summary

The first part of this chapter is dedicated to the MOS sample-and-hold circuit (S/H). The main physical limitations of the MOS S/H, namely switch on-resistance, thermal noise, and switch charge injection, are reviewed. Distortion produced by the non-linear switch resistance is modeled and some circuit-linearization techniques for MOS switches are introduced as well as low-voltage circuit techniques. Finally, clock-jitter effects on the MOS S/H are modeled and these effects in analog-to-digital converters are commented on. The second part of the chapter presents the basics of switched-capacitor (SC) circuits. Parasitic insensitive integrators and second-order filters are reviewed. Amplifier specifications for SC circuits are detailed, as well as some circuit techniques to reduce the effects of op-amp imperfections. The important topic of SC circuits fully compatible with digital MOS technology ends the section on SC circuits. The last part of the chapter briefly introduces alternative switched circuits, specifically switched-MOSFET and switched-current filters.

MOS sample-and-hold circuits

Sample-and-hold (or track-and-hold) circuits are ubiquitous in signal-processing circuits. They are used at the front end of analog-to-digital (A/D) converters and at the back end of digital-to-analog (D/A) converters. The signal-to-noise ratio of an A/D converter is usually limited by the performance of the sample-and-hold block. Furthermore, precision analog integrated circuits are mostly implemented by sampled-data circuits in which the basic building block is the S/H.

Sample-and-hold basics

An ideal S/H is depicted in Figure 10.1. During the sampling mode, the switch S is on and the output voltage tracks the input voltage.

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Chapter
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CMOS Analog Design Using All-Region MOSFET Modeling , pp. 404 - 451
Publisher: Cambridge University Press
Print publication year: 2010

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