This chapter first focuses on model compression and hardware acceleration for edge learning. It covers many aspects, including the learning algorithms, learning-oriented communication, distributed machine learning with hardware adaptation, TEE-based privacy protection, algorithm, and hardware joint optimization, etc. The essential objective is to implement an integrated algorithm-hardware platform, to optimize the implementation of emerging machine learning algorithms, to fully explore the potential of modern computation hardware, and to promote novel intelligent applications for sophisticated services. Then, we introduce straggler tolerance schemes that can avoid the overall training performance seriously degraded by faulty nodes, and can adequately utilize the computation power of slow nodes. At last, we introduce computation acceleration technologies for inference at the edge.