INTRODUCTION

Frequency synthesis is the generation of a periodic waveform having a specified frequency. Here we concern ourselves primarily with the generation of sinusoids, which are commonly required as LO signals in frequency conversion, and as carriers in analog modulations such as AM and FM. In this chapter we consider the synthesis of sinusoids using feedback oscillators (Sections 16.2–16.6), phase-locked loop synthesizers (Section 16.8), and direct digital synthesis (Section 16.9). The problem of phase noise and its effect on radio system performance is introduced in Section 16.4. Also, Section 16.10 summarizes additional considerations that arise in IC implementation of frequency synthesis devices.

LC FEEDBACK OSCILLATORS

In Section 8.5.1, it was noted that two-ports that are active and include internal feedback are prone to instability, and that one particular consequence of instability could be oscillation. In that context, oscillation was undesirable; now, however, let us consider how we might exploit this type of mechanism for frequency synthesis.

The LC Resonator

Let us begin with a well-known passive circuit that exhibits oscillatory behavior: The LC resonator, which is an inductor (the “L”) and a capacitor (the “C”) in parallel as shown in Figure 16.1. One first establishes a steady-state condition (Figure 16.1(a)) by applying a DC voltage source set to some non-zero value v 0> 0, which charges the capacitor to a voltage of v 0. At this point no current flows through the capacitor; subsequently, the voltage across the inductor is zero.

Oscillation begins when the applied voltage is removed, as indicated in Figure 16.1(b). No longer constrained by the source voltage, the capacitor begins to equalize the charge between its plates by sending current through the inductor. The resulting current through the inductor creates a magnetic field which grows stronger the longer the current flows. The voltage v across the capacitor decreases because the net difference in charge across the plates is diminishing.

Once the charge is evenly distributed between the plates of the capacitor (i.e., the capacitor is fully discharged), v = 0 (Figure 16.2(a)). However, the magnetic field that has built up in the inductor keeps the current flowing, and so the redistribution of charge across the capacitor plates continues. A short time later we have the situation shown in Figure 16.2(b): The voltage across the capacitor is negative and decreasing, the flow of current is decreasing, and the magnetic field of the inductor is decreasing.