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Design and evaluation of 20-GHz power amplifiers in 130-nm CMOS

Published online by Cambridge University Press:  19 June 2009

Mattias Ferndahl
Affiliation:
Microwave Electronics Lab, Department of Micro Technology and Nano Science, Chalmers University of Technology, SE-412 96 Göteborg, Sweden. Fax: +46-(0)31-164513.
Ted Johansson
Affiliation:
Infineon Technologies Nordic AB, SE-164 81 Kista, Sweden.
Herbert Zirath
Affiliation:
Microwave Electronics Lab, Department of Micro Technology and Nano Science, Chalmers University of Technology, SE-412 96 Göteborg, Sweden. Fax: +46-(0)31-164513.
Corresponding

Abstract

The use of 130-nm CMOS for power amplifiers at 20 GHz is explored through a set of power amplifiers as well as transistor level measurements. The power amplifiers explore single versus cascode configuration, smaller versus larger transistor sizes, and the combination of two amplifiers using power splitters/combiners. A maximum output power of 63 mW at 20 GHz was achieved. Transistor-level characterization using load pull measurements on 1-mm gate width transistors yielded 148-mW/mm output power. Transistor modeling and layout for power amplifiers are also discussed. An estimate on the maximum achievable output at 20 GHz from 130-nm CMOS power amplifiers, based on findings in this paper and the literature, is finally presented.

Type
Original Article
Copyright
Copyright © Cambridge University Press and the European Microwave Association 2009

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References

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Design and evaluation of 20-GHz power amplifiers in 130-nm CMOS
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