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Enhancing interface quality by gate dielectric deposition on a nitrogen-conditioned 4H–SiC surface

Published online by Cambridge University Press:  19 October 2012

John Rozen
Materials Science Research Laboratory, Central Research Institute of Electric Power Industry, Yokosuka, Kanagawa 240-0196, Japan
Masahiro Nagano*
Materials Science Research Laboratory, Central Research Institute of Electric Power Industry, Yokosuka, Kanagawa 240-0196, Japan
Hidekazu Tsuchida
Materials Science Research Laboratory, Central Research Institute of Electric Power Industry, Yokosuka, Kanagawa 240-0196, Japan
b)Address all correspondence to this author.
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Using metal-oxide-semiconductor devices, we show that the density of interface states at the SiO2/4H–SiC interface can be reduced by applying a N2 heat treatment to a silicon carbide (SiC) surface prior to the deposition of a gate dielectric. Remarkably, this technique yields an interface that is at least as good as the one formed by thermal oxidation in terms of electrically active defects. This improvement can be traced to nitrogen insertion at the semiconductor surface, which provides a seed layer for subsequent deposition. The nature of N incorporation and its impact on electrical properties were studied using x-ray photoelectron spectroscopy, secondary ion mass spectroscopy, and capacitance-voltage measurements. These results offer a new perspective in the quest to maximize minority carrier mobility and minimize energy loss in 4H–SiC switches.

Copyright © Materials Research Society 2012

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