Hostname: page-component-76fb5796d-skm99 Total loading time: 0 Render date: 2024-04-29T11:36:54.462Z Has data issue: false hasContentIssue false
  • English
  • Français

Nanotopography impact in shallow-trench isolation chemical mechanical polishing—analysis method and consumable dependence

Published online by Cambridge University Press:  03 March 2011

Jea-Gun Park ,
Takeo Katoh  and
Ungyu Paik
Jea-Gun Park
Affiliation:
Nano-SOI Process Laboratory, Hanyang University, Seoul 133-791, Korea
Takeo Katoh*
Affiliation:
Nano-SOI Process Laboratory, Hanyang University, Seoul 133-791, Korea
Ungyu Paik
Affiliation:
Department of Ceramic Engineering, Hanyang University, Seoul 133-791, Korea
*
a) Address all correspondence to this author. e-mail: tkatoh@sumcosi.com
Get access

Abstract

The nanotopography of the surface of silicon wafers has become an important issue in ULSI device manufacturing, as it affects the post–chemical mechanical polishing (post-CMP) uniformity of the thickness deviation of dielectric films. A spectral method is proposed to examine quantitatively how the nanotopography impacts the film thickness deviation during CMP. The nanotopography impact was investigated in terms of its dependence on the characteristics of consumables, such as the polishing pad hardness and the wafer manufacturing method. In addition, the effects of the surfactant and the abrasive size in ceria slurry on nanotopography impact were investigated. It was found that the magnitude of the post-CMP oxide thickness deviation due to nanotopography increased with the surfactant concentration in the case of smaller abrasives but was almost independent of the concentration in the case of larger abrasives. These results demonstrate that the nanotopography impact can be controlled by manipulating the slurry characteristics.

Keywords

SemiconductorFilmPolymer
Type
Articles
Information
Journal of Materials Research , Volume 19 , Issue 6 , June 2004 , pp. 1783 - 1790
Copyright
Copyright © Materials Research Society 2004

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

REFERENCES

1Xu, C.S., Zhao, E., Jairath, R. and Krusell, W.: Effects of silicon front surface topography on silicon oxide chemical mechanical planarization. J. Electrochem. Solid-State Lett . 1, 181 (1998).Google Scholar
2Ravi, K.V.: Wafer flatness requirements for future technologies, Intel Corp. Future Fab. International 7, 207 (1999).Google Scholar
3 SEMI Document M43-0301, Guide for Reporting Wafer Nanotopography.Google Scholar
4 B. Lee, T. Gan, D. Boning, P. Hester, N. Poduje, and W. Baylies: Nanotopography effects on chemical mechanical polishing for shallow trench isolation. Advanced Semiconductor Manufacturing Conference, Boston, MA, 2000 (unpublished).Google Scholar
5Lee, B. Ph.D Thesis, Massachusetts Institute of Technology, 2002.Google Scholar
6Boning, D. and Lee, B.: Nanotopography issues in shallow trench isolation CMP. MRS Bull. 27, 761 (2002).Google Scholar
7Fukuda, T., Shimizu, Y., Yoshise, M., Hashimoto, M., and Kumagai, T., in Proceedingsof the 3rd International Symposium on Advanced Science & Technology of Silicon Materials(The Japan Society for the Promotion of Science, Tokyo, Japan, 2000) p. 382.Google Scholar
8Katoh, T., Ko, B.G., Park, J.H., Yoo, H.C., Park, J.G. and Paik, U.G.: Effects of film type and nanotopography of wafers on oxide CMP characteristics. J. Korean Phys. Soc. 40, 180 (2002).Google Scholar
9Park, J.G., Katoh, T., Yoo, H.C. and Park, J.H.: Spectral analyses of the impact of nanotopography of silicon wafers on oxide chemical mechanical polishing. Jpn. J. Appl. Phys. 40 L857 (2001).CrossRefGoogle Scholar
10Park, J.G., Katoh, T., Yoo, H.C., Lee, D.H. and Paik, U.G.: Spectral analyses on pad dependency of nanotopography impact on oxide chemical mechanical polishing. Jpn. J. Appl. Phys. 41 L17 (2002).CrossRefGoogle Scholar
11Park, J.G., Katoh, T., Yoo, H.C., and Paik, U.G., in Proceedings of the 5th International Symposium on Chemical Mechanical Polishing, 201st Meeting of the Electrochemical Society (The Electrochemical Society, Pennington, NJ, 2002), PV 2002-1, p. 202.Google Scholar
12Katoh, T., Park, J.G., Lee, W.M., Jeon, H., Paik, U. and Suga, H.: The nanotopography effect of improved single-side-polished wafer on oxide chemical mechanical polishing. Jpn. J. Appl. Phys. 41 L443 (2002).Google Scholar
13Schmolke, R., Deters, R., Thieme, P., Pech, R., Schwenk, H. and Diakourakis, G.: On the impact of nanotopography of silicon wafers on post-chemical mechanical polished oxide layers. J. Electrochem. Soc. 149 G257 (2002).Google Scholar
14Muller, T., Kumpe, R., Gerber, H.A., Schmolke, R., Passek, F. and Wagner, P.: Techniques for analysing nanotopography on polished silicon wafers. Microelectronic Engineering 56, 123 (2001).CrossRefGoogle Scholar
15 H. Nojo, M. Kodera, and R. Nakata: Slurry engineering for self-stopping, dishing free SiO2-CMP. Proc. IEEE idem, San Francisco, CA, 1996 (The Institute of Electrical and Electronics Engineers, Piscataway, NJ, 1996) p. 349.Google Scholar
16 K. Hirai, H. Ohtsuki, T. Ashizawa, and Y. Kurata: High performance CMP slurry for STI. Hitachi Chemical Tech. Report No. 35, 17 (2000) [in Japanese].Google Scholar
17Philipossian, A. and Hanazono, M.Tribology and Fluid Dynamics Characterization of Cerium Oxide Slurries. (2001). Available at: http://www.innovative-planarization.com.Google Scholar
18 Y. Tateyama, T. Hirano, T. Ono, N. Miyashita, and T. Yoda, in Proceedings of the International Symposium on Chemical Mechanical Planarization IV, (The Electrochemical Society, Pennington, NJ, 2000) p. 297.Google Scholar
19 Y. Homma, T. Furusawa, K. Kusukawa, and M. Nagasawa, in Proc. CMP-MIC (Institute for Microelectronics Inter-Connection, Tampa, FL, 1996) p. 67.Google Scholar
20 D.S. Boning and O. Ouma: Chemical Mechanical Polishing in Silicon Processing, Semiconductors and Semimetals, Vol. 63 (Academic Press, New York, 2000), p. 108.Google Scholar
21Kubo, N.: Handotai heitanka CMP gijyutsu [CMP technology for semiconductor planarization], edited by Doy, T., Kasai, T., and Nakagawa, T. (Kogyo-chosakai, Tokyo, Japan, 1998), p. 124.Google Scholar
22Chekina, O.G. and Keer, L.M.: Wear-contact problems and modeling of chemical mechanical polishing. J. Electrochem. Soc. 145, 2100 (1998).Google Scholar