Analysis of the proposed RF mixer

The desired RF mixer is based on a GaAs pHEMT transistor. Pseudomorphic high electron mobility transistor offers high power gain, low noise figure, good linearity, small chip size, high transition frequency, low power consumption, and broadband operation. The mixer circuit is integrated with a diplexer filter as depicted in Fig. 1.

Figure 1.

Block diagram of the proposed pHEMT mixer.

The diplexer circuit consists of two microstrip bandpass filters tuned at the center frequencies of the RF and LO signals, respectively. The input matching circuit produces minimum reflected power at both the RF and LO frequencies. At the same time, the image and IFs are short-circuited by the diplexer filter. The output filter connected to the drain circuit of the GaAs pHEMT passes the IF signal while suppressing the RF and LO signals.

The LO drive signal modulates the channel of the GaAs pHEMT transistor, resulting in a time varying transconductance g_m(t) that can be expressed as

(1)\begin{equation}{g_m}(t) = {g_{m0}} + \sum\limits_{n = 1}^\infty {{g_{mn}}.\cos (2\pi n{f_{LO}}t)} \end{equation}

where g_{m 0} is the average value of the device transconductance, g_mn is the nth harmonic component of g_m, and f_LO is the frequency of the LO signal.

The FET is usually biased near threshold to maximize the fundamental component of the device nonlinear transconductance, and thereby to increase the conversion gain [Reference Gilmore and Besser12]. If the gate LO signal is sinusoidal then the transconductance will take a semi-half sinusoidal shape:

(2)\begin{align}{g_m}(t) & = \frac{{{g_{\max }}}}{\pi } + \frac{{{g_{\max }}}}{2}\cos (2\pi {f_{LO}}t) + \frac{{2{g_{\max }}}}{{3\pi }}\cos (4\pi {f_{LO}}t)\nonumber\\ &\quad{}- \frac{{2{g_{\max }}}}{{15\pi }}\cos (8\pi {f_{LO}}t) + \end{align}

where g_max is the maximum value of the transconductance at saturation drain current.

It seems from equation (2) that the DC component of the transconductance is g_max/π, and the fundamental component g_{m 1} is equal to g_max/2. The transconductance of the ATF-34143 pHEMT is displayed versus gate–source voltage in Fig. 2 by means of Keysight’s Advanced Design System (ADS)DC simulation. The maximum transconductance value is about 250 mS at a drain saturation current of 150 mA, and drain–source voltage of 3 V.

Figure 2.

Simulated transconductance versus gate voltage.

A simplified intrinsic equivalent circuit model of the pHEMT is shown in Fig. 3 [Reference Grebennikov and Franco13], which is supplied with an RF input signal. It is assumed that Y_L presents short-circuit for the RF signal and a conjugately matched impedance at the IF, while Z_S is optimally matched with the input impedance of the transistor at the RF. If the drain is short-circuited at the RF by the IF filter, then the input admittance Y_in will be

(3)\begin{equation}{Y_{in}} = \frac{{j{\omega _{RF}}{C_{gs}}}}{{1 + j{\omega _{RF}}{C_{gs}}{R_{gs}}}} + j{\omega _{RF}}{C_{gd}}\end{equation}

Figure 3.

Simplified equivalent pHEMT circuit for the RF input signal [Reference Grebennikov and Franco13].

The gate–drain capacitance C_gd is small when compared with C_gs and can be ignored. Therefore, the input impedance of the RF transistor can be approximated by the series combination of R_gs and C_gs.

The RF input signal can by expressed by

(4)\begin{equation}{v_{RF}}(t) = {V_{RF}}.\cos (2\pi {f_{RF}}t)\end{equation}

where V_RF is the amplitude of the RF input signal.

To achieve conjugate matching at the gate of the transistor for the RF signal, the real part of the source impedance Re[Z_S] should be equal to the gate–source charging resistance R_gs, while the imaginary part Im[Z_S] must be inductive to resonate with C_gs. Therefore, the gate input RF current is estimated from

(5)\begin{equation}{i_{in}}(t) = \frac{{{V_{RF}}}}{{2{R_{gs}}}}.\cos (2\pi {f_{RF}}t)\end{equation}

The available RF input power is calculated from

(6)\begin{equation}{P_{RF}} = \frac{{{V_{RF}}^2}}{{8{R_{gs}}}}\end{equation}

The drain current is obtained from

(7)\begin{equation}{i_D}(t) = {g_m}(t).{v_{gs}}'(t)\end{equation}

where v _gs^′(t) is the voltage across the intrinsic gate capacitance C_gs. It can be obtained from the multiplication of the gate current with the reactance of C_gs:

(8)\begin{equation}{v_{gs}}'(t) = \frac{{{V_{RF}}}}{{2{\omega _{RF}}{C_{gs}}{R_{gs}}}}.\cos (2\pi {f_{RF}}t)\end{equation}

Substituting equations (2) and (8) in equation (7) and taking the IF component (f_LO-f_RF) only, the drain IF current can be expressed by

(9)\begin{equation}{i_{IF}}(t) = \frac{{{V_{RF}}.{g_{\max }}}}{{8{\omega _{RF}}{C_{gs}}{R_{gs}}}}.\cos (2\pi ({f_{LO}} - {f_{RF}})t)\end{equation}

In order to maximize the conversion gain, the load admittance Y_L is set to be conjugately-matched with the output admittance of the pHEMT. Hence, the drain–source capacitance C_ds is compensated by the parallel inductance of the load impedance at the IF, while R_L is set equal to R_ds and therefore the parallel combination of R_ds with R_L becomes equal to R_L/2. The load power at the IF is therefore calculated from

(10)\begin{equation}{P_{IF}} = \frac{1}{2}{I_{IF}}^2.({R_L}/2) = \frac{{{V_{RF}}^2.{g_{\max }}^2}}{{256{\omega _{RF}}^2{C_{gs}}^2{R_{gs}}^2}}.{R_L}\end{equation}

where I_IF is the amplitude of the drain IF current signal. The conversion gain of the mixer can be obtained by dividing equation (10) by (6):

(11)\begin{equation}{G_c} = \frac{{{P_{IF}}}}{{{P_{RF}}}} = \frac{1}{{32}}.{\left( {\frac{{{g_{\max }}}}{{2\pi {f_{RF}}{C_{gs}}}}} \right)^2}.\frac{{{R_L}}}{{{R_{gs}}}}\end{equation}

Equation (11) reveals that the conversion gain is proportional to the squared value of the maximum transconductance of the active device. The maximum transconductance is obtained by driving the gate of the pHEMT with an adequate LO power. It is important to indicate that equation (11) is a rough estimate for the conversion gain. More accurate relations can be obtained by taking the extrinsic parasitic elements of the transistor into account together with the nonlinear elements of the large-signal pHEMT model.

Design and construction of the compact diplexer

In addition to isolating the RF and LO signals, the diplexer can significantly attenuate the image frequencies at the input of the mixer circuit. The proposed microstrip diplexer is based on two dual-mode resonators that are tuned at the RF and LO frequencies, respectively. A transmission line loaded with lumped capacitors at both of its ends can produce a compact resonator with wide stop-band characteristic when the lumped capacitors are replaced with folded open stubs [Reference Hong and Lancaster14]. If this improved resonator is loaded in its mid-point with a short-circuited stub then a dual-mode resonator can be obtained with enhanced selectivity and adjustable passband response [Reference Athukorala and Budimir15]. The layout of the resulting resonator is sketched in Fig. 4. The line sections L ₁, L ₂, and L ₃ constitute a quasi λ_g/4 short-circuited resonator at each mode, where λ_g is the guided wavelength.

Figure 4.

Structure of the proposed dual mode resonator.

Odd/even-mode analysis can be used to evaluate the resonance frequencies in each mode for such a symmetrical configuration [Reference Zhang, Chen, Xue and S-m16]. The equivalent odd-mode impedance can be obtained when there is a voltage null (short-circuit) at the plane of symmetry as shown in Fig. 5(a). On the other hand, the equivalent even-mode impedance is evaluated when there is no current flow (open circuit) at the bisection line of the resonator as indicated in Fig. 5(b).

Figure 5.

Equivalent microstrip structures for evaluating the odd- and even-mode impedances.

The odd-mode input impedance for the structure of Fig. 5(a) is given by

(12)\begin{equation}{Z_{in,odd}} = j{Z_1}\frac{{{Z_1}\tan ({\theta _1}) + {Z_2}\tan ({\theta _2})}}{{{Z_1} - {Z_2}\tan ({\theta _1}).\tan ({\theta _2})}}\end{equation}

where Z ₁ is the characteristic impedance of L ₁, Z ₂ is the characteristic impedance of line L ₂, θ ₁ = βL ₁, and θ ₂ = βL ₂ are the electric lengths of L ₁ and L ₂, respectively.

At resonance, Z_in,odd = ∞ and therefore we have

(13)\begin{equation}\tan ({\theta _1}).\tan ({\theta _2}) = \frac{{{Z_1}}}{{{Z_2}}}\end{equation}

To simplify the analysis, we assume intentionally that the line widths W ₁ and W ₂ are equal to each other, so that Z ₁ = Z ₂. In this case, the structure behaves as a λ_g/4 uniform impedance resonator (UIR).

(14)\begin{equation}\tan ({\theta _1}).\tan ({\theta _2}) = 1\end{equation}

From trigonometry, it can be shown that when tan(θ ₁).tan(θ ₂) = 1 then

(15)\begin{equation}{\theta _1} + {\theta _2} = \pi /2\end{equation}

Converting electric lengths to their equivalent physical lengths, we can write

(16)\begin{equation}{L_1} + {L_2} = {\lambda _g}/4\end{equation}

The odd-mode resonant frequency is therefore given by

(17)\begin{equation}{f_{odd}} = \frac{c}{{4({L_1} + {L_2})\sqrt {{\varepsilon _{eff}}} }}\end{equation}

where c is the speed of light in free-space, and ε_eff represents the effective dielectric constant of the substrate.

Similarly, to simplify the even-mode analysis we assume that W ₁ = W ₂ and W ₃ = 2W ₂ (or Z ₃ = Z ₂/2) and hence the line sections L ₁, L ₂, and L ₃ constitute a short-circuited λ_g/4 UIR at the even-mode frequency. Therefore

(18)\begin{equation}{L_1} + {L_2} + {L_3} = {\lambda _g}/4\end{equation}

The even-mode resonant frequency is thereby evaluated from

(19)\begin{equation}{f_{even}} = \frac{c}{{4({L_1} + {L_2} + {L_3})\sqrt {{\varepsilon _{eff}}} }}\end{equation}

It can be noticed from equation (19) that the even-mode resonance frequency is less than the odd-mode resonance frequency, and this difference is dependent on the length of the short-circuited line L ₃.

The response of the resonator has been simulated by means of ADS Keysight’s software to evaluate the odd- and even-mode resonant frequencies using Rogers RO4350B substrate with thickness h = 1.524 mm, dielectric constant ε_r = 3.66, coductor thickness of 35 µm, and dielectric loss tangent of 0.003. The resonator dimensions are selected such that W ₁ = 3.3 mm, W ₂ = 1.5 mm, W ₃ = 3 mm, g = 3 mm, L ₁ = 8 mm, L ₂ = 37.5 mm, and L ₃ is adjusted between 6 and 10 mm to show the deviation between f_odd and f_even. The resonator is excited by two capacitively coupled lines that are placed in parallel to its vertical sides of the line section L ₂ with space distance of 0.3 mm. Figure 6 shows the insertion loss, S ₂₁, versus frequency for three values of the perturbation element L ₃. It can be noticed that f_odd is fixed at 900 MHz, while f_even is reduced by the increase in L ₃. This behavior is predicted by the derived equations (17) and (19). We note also that the selectivity of the resonator can be varied by the change of the shorted-stub length L ₃.

Figure 6.

Simulated insertion loss of the resonator with three different values of L _3.

The proposed diplexer consists of two dual-mode resonators tuned at center frequencies of 850 and 1050 MHz, representing the RF and LO center frequencies, respectively. The two resonators are capacitively coupled together to a common input port via two thin coupled lines that are branched from a 50 Ω feeding line. This technique permits the avoidance of a T-junction splitter, thereby reducing the overall size of the diplexer. The coupled lines also provide DC current blocking when cascading the diplexer with the transistor mixer circuit. In order to provide an operating RF bandwidth from 800 to 900 MHz, the coupling lengths of the feeding lines at the three ports are slightly increased as shown in Fig. 7. The lengths of the short-circuited stubs in both resonators are reduced to improve the insertion losses and adjust the filters’ selectivity. When L ₃ is minimized, the even mode resonant frequency of each resonator will be close to the odd-mode frequency as illustrated in equations (17) and (19). Besides, two open-circuited stubs are inserted at the feeding ports 2 and 3. These stubs act as quasi λ_g/4 transmission lines at the harmonic frequencies for each filter to suppress the spurious response and improve the rejection band. The dimensions of the diplexer structure are optimized using the momentum electromagnetic (EM) simulator of ADS. The optimized layout of the diplexer is presented in Fig. 7. The proposed diplexer offers a simple and easy to design microstrip structure.

Figure 7.

Layout of the designed microstrip diplexer (All dimensions are in mm).

A prototype model for the diplexer has been fabricated based on Rogers RO4350B substrate and is depicted in Fig. 8. The overall size of the implemented diplexer is 54.5 mm × 31.6 mm, corresponding to 0.26 λ_g × 0.15 λ_g where λ_g is measured at 850 MHz. The circuit is simulated using ADS software of Keysight and then tested experimentally with the aid of the Anritsu MS4642A network analyzer. Figure 9 shows the measured insertion loss response of the filters compared with the simulated performance.

Figure 8.

Photograph showing the fabricated microstrip diplexer.

Figure 9.

The simulated and measured insertion losses of the diplexer filters.

It is clear from equation (17) that the odd-mode resonant frequency is independent on the length of the short-circuited line L ₃.

It can be shown that the RF and LO filters produce low insertion losses in their passband regions. At the RF center frequency of 850 MHz, the measured insertion loss S ₂₁ is −0.7 dB, while the insertion loss S ₃₁ of the LO filter is −0.774 dB at an LO frequency of 1050 MHz. The 3 dB bandwidth of the RF band is about 100 MHz (11.7% fractional bandwidth), ranging approximately from 800 to 900 MHz. On the other hand, the 3-dB cutoff frequencies at the LO band are 982 and 1122 MHz, respectively, producing a bandwidth of 140 MHz (13.3% fractional bandwidth). The slight increase in the operating bandwidths of the diplexer filters for the practical response over the simulated response may be referred to the increase in the effective length of the shorted stubs due to the soldering process of the VIA pads. Transmission zeros are also noticed near the spurious bands due to the effect of the added λ_g/4 stubs in the feeding ports of the filters. The return loss responses of the diplexer filters are sketched in Fig. 10. The measured input reflection coefficient S ₂₂ for the RF-band filter at port 2 is less than −17 dB, while its value is less than −12 dB at port 3 for the LO-band. It is also clear from Fig. 10 that each dual-mode resonator provides a two-pole (second order) filter response. Finally, the isolation between ports 2 and 3 is presented in Fig. 11. The measured diplexer isolation between the RF and LO ports is better than 23 dB across the frequency bands of interest. The reduction in the measured isolation when compared with the simulated response is referred to the slight increase in the operating bandwidths of the RF and LO filters.

Figure 10.

Input return-losses at ports 2 and 3 versus frequency.

Figure 11.

Isolation between the RF and LO ports versus frequency.

The performance characteristics of the designed diplexer are compared in Table 1 with some other published works, showing competitive parameters in terms of low insertion loss, moderate fractional bandwidth, and small circuit size.

Table 1.

Performance comparison of the proposed diplexer with other published works

Design of the mixer circuit

The design of the active mixer circuit begins by selecting an appropriate RF transistor and characterizing its DC and RF behaviors. The GaAs pHEMT low cost transistor ATF-34143 of Broadcom is selected to implement the mixer circuit. In order to sustain RF and LO signals suppression at the output port of the mixer while passing the IF signal at 200 MHz, a low-pass filter with cutoff frequency of 300 MHz has been designed for this purpose. The Chebyshev table for a prototype filter is used to evaluate the values of filter lumped elements. However, in order to suppress the RF and LO signals, lumped inductors are added in series with the capacitors in the shunt arms to constitute series resonant circuits at the specified frequencies. This results in a quasi-elliptic filter response and an improved rejection for the RF and LO signals as shown in the simulated response of the filter in Fig. 12.

Figure 12.

Simulated insertion and return losses of the IF filter.

In order to test the stability of the circuit at the RF, the pHEMT has been terminated at its output with the designed IF filter and the device is biased near threshold with a drain current of 20 mA and drain voltage of 3 V. There is no meaningful mathematical criterion to test the stability of nonlinear microwave circuits [Reference Maas8]. However, conventional S-parameter theory for RF amplifier stability criterion can be employed to investigate the stability of active mixers [Reference Henderson and Camargo24]. Large signal S-parameter simulation can be carried out to evaluate the stability factor, K, versus input signal level.

There are two techniques that can be adopted to increase the stability factor. The choice between them is dependent on the specific application. The first one, which is the simpler to implement, is performed by adding series gate resistance at the device input. This may be adequate for increasing the stability factor by raising the overall resistive part of the input impedance at the expense of some reduction in power gain and degradation in noise figure. The optimum value of the gate resistance can be found through computer simulation. The other technique is done through source degeneration by connecting a resistance or an inductance at the source of the FET. This technique can also improve the linearity of the circuit when used as an amplifier in addition to improving the stability. However, the power gain may be significantly degraded in this case. The advantage of this method is lower effect on noise figure, particularly when source inductance is used. The practical implementation is somewhat more difficult especially when the source of the RF transistor is connected to the case in grounded source packages. Source degeneration is more common in RF integrated circuit mixers.

In this design, we have selected the simple gate resistance stabilizing method. Therefore, a stability resistor is inserted at the gate circuit to improve the stability factor and prevent any tendency toward oscillation. The schematic of the test circuit is depicted in Fig. 13. Since the pHEMT has high power gain in the very high frequency (VHF) band, there is no need to design a matching network at the IF and therefore the filter circuit is cascaded directly with the drain terminal of the active device. The series resonator C ₁-L ₁ acts as a trap for the RF signal, while C ₃-L ₃ provides a ground path for the LO signal. The circuit is simulated with an RF of 850 MHz and input power sweep from −25 to +10 dBm with the aid of the manufacturer’s pHEMT nonlinear ADS model.

Figure 13.

Test circuit for evaluating the stability factor and input impedance.

The simulated stability factor of the circuit is sketched in Fig. 14. It can be seen that the transistor is potentially unstable when there is no stability resistance in the gate circuit. However, the stability of the circuit can be improved by increasing the stability resistor R_st to values above 39 Ω. Additional advantage of the stability resistance is to raise the real part of the gate input impedance which simplifies the design of the input matching circuit of the mixer at both the RF and LO frequencies. Figure 15 presents the large signal input impedance, Z _in = R _in + jX _in, of the transistor circuit versus input signal level at 850 MHz for a stability resistance of 39 Ω. It can be observed also from this figure the variation of the input impedance for input power values greater than −10 dBm due to the nonlinear effects of the transistor’s gate–source capacitance and resistance [Reference Crupi, Raffo, Avolio, Bosi, Sivverini, Palomba, Caddemi, Schreurs and Vannini25].

Figure 14.

Stability factor versus input RF drive level for two values of stability resistor.

Figure 15.

Large signal pHEMT input impedance versus input power at the RF.

For the sake of comparison between the series gate resistance stabilizing technique and the source degeneration technique, a source inductance (L_s) of 10 nH has been inserted in each source lead of the FET device in the circuit of Fig. 13 after omitting the stability resistance R_st. The simulation result presented in Fig. 16 shows an improvement in the stability factor to a value of 1, while greatly increasing the magnitude of the device’s input impedance because of the developed negative feedback as illustrated in Fig. 17. This increase in the real and imaginary parts of Z_in will make the design of the mixer’s input matching circuit more complicated. Any further increase in the source inductance has no noticeable effect on K while increasing the device’s input impedance to higher levels. On the other hand, the addition of a series gate resistance makes the input matching circuit very simple.

Figure 16.

Stability factor versus input RF power for a degeneration source inductance of 10 nH.

Figure 17.

Input impedance versus input RF power for a source inductance of 10 nH.

Based on the evaluated input impedance in Fig. 15 at the desired RF, the input matching network of the mixer circuit is initially designed graphically with the aid of Smith chart and then is optimized using ADS. It consists of a series inductance of 27 nH and another shunt inductance of 47 nH to tune out the input capacitance of the active device for a specific frequency range. The shunt inductor can be used to supply the gate bias voltage for the pHEMT device. The mixer circuit has been integrated with the microstrip diplexer as depicted in Fig. 18. Note that there is no need to connect a coupling capacitor between the diplexer and the transistor circuit since the output port of the diplexer is coupled to the resonators via parallel coupled lines. The LO and RF signals are directly coupled to the diplexer input ports as illustrated in Fig. 18.

Figure 18.

Schematic diagram for the designed RF mixer circuit.

The mixer circuit has been simulated using the ADS co-simulation capabilities by first evaluating the performance of the microstrip diplexer using EM momentum simulator and then integrating it with schematic of the circuit as an external component. The final circuit is simulated by means of the harmonic-balance algorithm. Figure 19 presents the drain current waveform for an RF signal frequency of 850 MHz, RF input power of −10 dBm, LO signal frequency of 1050 MHz, and LO drive power of 0 dBm. The pHEMT is biased with a drain current of 20 mA. It is clear from the figure that the LO power is quite enough to modulate the transconductance of the FET, resulting in the mixing process. The envelope of the RF current signal follows the IF with a period of 5 ns. Since the device is biased close to the threshold point (class-AB biasing), then the negative current peaks are clipped off. As the LO power is increased, the peak values of the drain signal current are increased, causing an increase in the drain current DC component and conversion gain. When the LO signal level is raised to a higher level, this may cause clipping in the positive peaks of the drain current due to device saturation, resulting in a reduction in the output IF power and conversion gain. The output IF signal and its spectrum are sketched in Fig. 20. The output waveform approaches the sinusoidal shape due to the filtering effect of the output IF filter in suppressing the spurious frequency components. As shown in Fig. 20(b), the output IF signal level is about +9.5 dBm with an input RF level of −10 dBm, revealing a conversion gain of 19.5 dB. It is noticed also that the IM-product frequencies are significantly rejected by the IF filter. The RF and LO signals are attenuated by more than 85 dB below the IF signal due to the elliptic stop-band characteristic of the filter. The closest frequency component to the desired IF signal is the second harmonic of the IF signal (2f_IF) with a frequency of 400 MHz and power level of about 40 dB below the fundamental IF component.

Figure 19.

Simulated drain current waveform of the mixer circuit with LO drive level of 0 dBm and RF power of − 10 dBm.

Figure 20.

Simulated output signal in time domain (a) and frequency domain (b).

Mixer circuit construction and performance results

The GaAs pHEMT mixer circuit and the microstrip diplexer were both integrated on the same substrate as depicted in Fig. 21(a). Both SMD components and wire-wound inductors were used to implement the passive elements of the circuit. The values of wound inductors of the output IF filter were measured by means of a vector network analyzer at the desired VHF range before fixing them in the circuit board. Wire-wound inductors are preferred over microstrip lines in VHFs due to conservation in size. Chip inductors can also be used for lower size but the wire-wound inductors can withstand more RF power. Additional bypass and decoupling capacitors were used to isolate the DC power supplies from the RF circuit and to prevent parasitic oscillations. The measurement setup of the mixer circuit is shown in Fig. 21(b), consisting of two RF signal generators and a spectrum analyzer.

Figure 21.

Constructed active mixer circuit (a) and its test-setup (b).

The LO drive power P_LO has been swept to evaluate the mixer performance, keeping the input RF power constant at −20 dBm. The simulated and measured conversion gains against LO drive power are displayed on the same plot in Fig. 22, where the RF input signal power is maintained at −20 dBm while the RF signal frequency is set at 850 MHz, and the LO frequency is fixed at 1050 MHz. The peak value of the simulated conversion gain is about 21 dB and occurs at LO power of approximately +2 dBm. On the other hand, it seems that the measured conversion gain is lower than the simulated gain with the peak gain point is shifted to a drive LO power of +5 dBm at which the conversion gain is about 18.5 dB. This may be referred to the mismatch loss in the LO matching circuit and the deviation in practical components from the ideal calculated values. With further increase in LO input power, the conversion gain reduces again due to device saturation. Figure 23 presents the variation of the DC component of the drain current with input LO drive level. At low drive power, the average value of the drain current is about 20 mA and is equal to the quiescent current value. However, at large drive signal levels the average drain current increases rapidly due to the increase in the amplitude of the drain current signal, where the negative half cycle is clipped out because of device pinch-off. It is noticed that the measured average drain current is less than the simulated current due to lower IF output power and lower measured conversion gain. The measured average drain current is about 55 mA at LO drive power of +2 dBm, revealing a drain consumed DC power of 165 mW.

Figure 22.

Conversion gain versus LO power.

Figure 23.

Drain DC current component versus drive LO power.

The RF input power P_RF is also swept from −30 to +5 dBm with constant LO drive power of +2 dBm. Figure 24 presents the variation of conversion gain against RF input power. The small signal measured conversion gain is 18 dB when compared with a value of 21 dB for the simulated gain. As the RF power is being increased, the conversion gain compresses due to nonlinear device operation. The measured input RF power for 1-dB gain compression point is about −8 dBm. In Fig. 25, the output IF power is sketched against input RF power. After input RF power of −8 dBm, the device behavior becomes nonlinear, causing compression and saturation in output IF power.

Figure 24.

Variation of conversion gain with RF input power for a fixed LO power of 2 dBm.

Figure 25.

Output IF power versus input RF power for an LO power of 2 dBm.

In Fig. 26, the conversion gain of the mixer circuit has been evaluated over an RF range from 800 to 900 MHz, keeping the IF at 200 MHz by adjusting the LO frequency. The LO drive power is maintained at 2 dBm, and the RF input power is set to −20 dBm. It can be shown that there is a difference between simulated and measured gain values. This change is referred to the parasitic elements, tolerances in component values, imperfections of fabrication, mismatch losses, coupling losses, and deviation between the ADS and actual physical pHEMT device models. The significant reduction in the conversion gain at the lower band edge is due to the relatively higher insertion loss of the RF diplexer filter in these frequencies as depicted in Fig. 9. However, the circuit has proved to operate with good stability, good reduction of LO’s signal at the output, and good isolation between the LO and RF input signals due to the filtering effect of the microstrip diplexer.

Figure 26.

Conversion gain versus frequency.

Finally, the rejection capability of the mixer circuit to image frequencies is tested by entering signals with image frequencies corresponding to each RF shown in Fig. 26 and according to the following relation:

(20)\begin{equation}{f_{IM}} = {f_{RF}} + 2{f_{IF}}\end{equation}

At each image frequency, an input signal with level of −20 dBm is supplied to the mixer RF input port, and the output signal level is measured by means of a spectrum analyzer. Figure 27 presents the image signal level compared to the actual IF signal power against image frequency, showing a reduction of greater than 25 dB.

Figure 27.

Image signal level versus frequency.

Table 2 presents a generalized comparison of the overall mixer performance metrics with other recently published works on single-ended active mixers. As indicated in this table, the proposed mixer circuit provides good isolation of better than 23 dB across a broad range of frequencies (see Fig. 11). Some other works use Wilkinson [Reference Panwar, Pandit and Pathak5] or rat-race [Reference Ball7] combiners to achieve RF/LO isolation. However, these combiners are narrowband in nature and cannot provide high isolation over a wide range of RFs. Besides, they add an additional insertion loss of 3 dB at the operating RF and LO passbands, causing some loss in RF/LO power. The sizes of these couplers at ultra-high frequencies are significantly large when compared with the suggested compact diplexer used in this work. Other works use either the poor isolation method of inserting low-valued capacitors in the LO signal path or the drain pumped mixing method that can produce moderate isolation levels.

Table 2.

Comparison of the proposed mixer performance with other published works

The high conversion gain in the proposed mixer circuit is achieved at the expense of relatively high consumed drain power P _D, where the active device is driven with large DC current component. The relatively low required driving LO power, P _LO, is referred to the use of the diplexer filters for coupling the LO signal and isolating it from the RF signal without the need of small-valued coupling capacitors.