Passive HEMT characterization

This paper employs the WIN Semiconductors NP12-01 GaN-on-SiC technology targeting mm-wave power applications. This 0.12 μm gate process is manufactured on 50 μm SiC substrates. It uses a source-coupled field plate design to provide the high breakdown voltage required for reliable operation at the drain bias of 28 V, showing a typical saturated output power of 4 W/mm and drain efficiency over 50% at 29 GHz. The NP12-01 platform supports multiple microwave monolithic integrated circuit (MMIC) functions, including optimized switch transistor layouts, two interconnect metal layers, high-reliability metal-insulator-metal (MIM) capacitors, precision TaN resistors, and through wafer’s vias for low inductance grounding. While Fig. 2(a) shows a microphotograph of the switch cell, Fig. 2(c) presents a block diagram illustrating both its topology and biasing configuration.

Figure 2.

Microphotograph of a five-finger gate device with a $100\,\mu\mathrm{m}$ gate width using NP12 technology (a), circuit diagram and biasing configuration of the same device (b), device performance through small signal characterization (c).

The small signal performance of the switch cell is evaluated in terms of on-state insertion loss and off-state isolation, both calculated from the forward transmission coefficient ( $\mathrm{S}_{21}$) expressed in decibels (dB):

(1)\begin{equation} 20 \log_{10}(|S_{21}|)\ \left\{\begin{array} {l l} \mathrm{Insertion\,loss} & if\,\mathrm{ON}\\\\ \mathrm{Isolation}& if\, \mathrm{OFF} \end{array}.\right. \end{equation}

Figure 2(b) displays the measurement of the small signal scattering parameters of the device under both ON (0 V) and OFF (−30 V) conditions, covering the frequency range from 500 MHz to 40 GHz. While the device exhibits acceptable responses throughout the frequency spectrum during on-state, limitations arise during off-state, particularly at higher frequencies, primarily attributed to parasitic capacitance effects.

The widely accepted figure of merit (FoM) for switches known as cutoff frequency ( $F_{\mathrm{c}}$) is a product of low and high impedance during the ON and OFF conditions, respectively [Reference Drozdovski and Caverly6, Reference Campbell, Dumka and Kao7]:

(2)\begin{equation} F_{\mathrm{c}} = 1 \,/\, ( 2 \cdot \pi \cdot R_\mathrm{on} \cdot C_{\mathrm{off}}), \end{equation}

where

(3)\begin{equation} R_{\mathrm{on}} = 2Z_{0}\, \left( {10^{-\frac{S_{21}(\mathrm{dB})}{20}} - 1} \right) \end{equation}

(4)\begin{equation} C_{\mathrm{off}} = 1 \,/2Z_{0}\, \left ( \omega \cdot \sqrt{10^{-\frac{S_{21}(\mathrm{dB})}{10}} - 1} \right). \end{equation}

The $F_{\mathrm{c}}$ is a performance indicator rather than representing the actual operating frequency, and the rule of thumb suggests that the switch cell should be usable in designing microwave switches up to approximately $F_{\mathrm{c}}/10$.

Table 1 provides a comparative analysis of the NP12 technology used in this work and the NP15 technology from the early version of this work [Reference Ghozati, Quaglia, Azad, Powell, Tasker and Cripps5]. This information provides insights into their $F_{\mathrm{c}}$ product, aiding in our decision to transition from NP15 to NP12, given the design frequency around 30 GHz.

Table 1.

Comparison of simplified switch characteristics between the NP12 and NP15 technologies

Small signal model

Due to the absence, at the time of the design, of a large signal model for the switch in the process design kit and considering the time constraints associated with generating a complete nonlinear model, the decision was made to proceed based on small signal measurements and an equivalent small signal model. The small signal model is developed based on proposed components and formulations by [Reference Ehoud, Dunleavy, Lazar and Branson8]. Figure 3(a) illustrates the equivalent circuit diagram of the model, which includes gate-to-source capacitance, gate-to-drain capacitance, and channel inductance ( $C_{\mathrm{sg}}$, $C_{\mathrm{dg}}$, $L_{\mathrm{ch}}$), all of which are known as common parasitic to both ON and OFF states. In the OFF state, a drain-source capacitance ( $C_{\mathrm{ds}}$) and in the ON state, a total drain-source resistance ( $R_{\mathrm{ds}}$) are introduced as core components to demonstrate high and low impedance conditions, respectively. It is important to note that although the common components remain the same, their values differ significantly between the ON and OFF modes. For model validation, the measured S-parameters are compared with the model responses depicted in Fig. 3. The application of small signal model during the design phase proved adequate, as the operating frequency remained below the device’s cutoff frequency, ensuring linear behavior. Additionally, the switch is intended to function with minimal power impact, operating within the device’s power limits as determined by the 1 dB compression point in the ON condition and achieving isolation better than −20 dB in the OFF state.

Figure 3.

Simplified small signal model components for both ON and OFF conditions (a), return losses for both ON and OFF conditions (b), model and measured response comparison; magnitude of forward transmission (c), phase of forward transmission (d).

Switching network design

The effectiveness of shunt topology in switch design, particularly in regard to insertion loss, is widely acknowledged [Reference Schindler and Morris9]. Therefore, a reflective shunt arrangement has been selected as illustrated in Fig. 4(a). The shunt leg would operate reciprocally to the port itself, while the device in the shunt leg is in the on-state, the port is in the inactive (isolating) mode, and vice versa.

Figure 4.

Reflective topology of the stand-alone shunt (a), measured device impedance transformation from low frequency to 30.5 GHz under both ON and OFF conditions ( $Z0$ = 50Ω) (b).

Figure 4(b) depicts the transition of the impedance corresponding to the lowest measured frequency (500 MHz) to the impedance corresponding to the highest measured frequency (30.5 GHz) under the ON and OFF conditions. The device in the on-condition (port inactive) maintains an acceptable low impedance ( $\approx(0.115+j0.34)Z_0$) peaking at 30.5 GHz. However, during the devices’ off-condition (port active), a significant deviation occurs, transitioning from a high impedance condition (near open circuit) at lower frequencies to a considerably lower impedance ( $\approx(0.121-j0.655)Z_0$) when approaching 30.5 GHz.

This degradation in performance under stand-alone configurations at higher frequencies motivated further exploration into impedance transformation techniques. Incorporating a resonating network into the shunt leg preceding the passive HEMT device (in contrast to [Reference Lan, Dunn, Chen, Pao and Wang10] where the resonating component was in parallel with the passive FET device) showed promising results in simulations. As illustrated in Fig. 5(a), the network comprises a series transmission line connected to two parallel tapered open circuit stubs, providing an equivalent shunt capacitance in series with another high-impedance line. In contrast to the impedance transformation network presented in [Reference Lin, Wang, Niu and Wang11], which converts a low impedance to a high impedance and vice versa, the resonating network presented in this work is designed to optimize the impedance with the aim of a lower impedance (near short) during the ON condition of the devices (port inactive) and high impedance (near open) during the OFF condition of the devices (port active) throughout the spectrum of frequencies with consistent physical geometry.

Figure 5.

Resonating network preceding the passive HEMT device (a), passive HEMT impedance transformation at 30.5 GHz: port active (b), port inactive (c).

At the design frequency (30.5 GHz) when the output port is in the active condition, the device which is biased with −30 V (device OFF) shows the impedance at the point p4 in Fig. 5(b). The resonating network transforms the impedance from p4 to p0, ensuring that the traveling signal encounters an impedance closer to the open circuit at junction p0 in Fig. 5(a). In contrast, when the output port is inactive the device is biased with 0 V (device ON), resulting in a low impedance with inductive behavior at point p4 in Fig. 5(c), the resonating network facilitates the transformation from p4 to p0, ensuring that the traveling signal encounters a short circuit at junction p0 in Fig. 5(a) and directed toward the source via ground.

The tapered open-circuit stubs apply minimal impact during the HEMT off-state (port active), as their capacitive reactance is relatively insignificant compared to the drain-to-source capacitance of the passive HEMT in off-condition. However, their significance becomes more pronounced during the HEMT on-state (port inactive), which is crucial in transforming the impedance toward a point near-short.

The resonating network shown in Fig. 5(a) compensated for the degradation of the HEMT device in switching operations at the design frequency. The same topology was duplicated and connected to a common node through quarter-wavelength transmission lines to form an SPDT. Initially, each arm of the SPDT included a single resonating network. However, during optimization, it was discovered that a better bandwidth response could be achieved by utilizing two resonating networks in parallel, interconnected by quarter-wavelength transmission lines, as depicted in Fig. 6(a), which shows the detailed schematic of the SPDT with two shunt resonating networks at each arm. Each resonating network was independently optimized during the layout transformation. The symmetrical topology of the SPDT simplifies the measurement process, as a single arm can be tested for both active and inactive conditions.

Figure 6.

Detailed schematic of the SPDT (a), insertion loss and isolation versus frequency (b), loss parameters (c).

Circuit-level simulation, performed using the completed layout of the SPDT with values detailed in Fig. 6(a), confirms an insertion loss of better than −1.7 dB and isolation below −20 dB for a 2 GHz bandwidth, as illustrated in Fig. 6(b). The results obtained indicate the potential to extend the bandwidth via isolation enhancement, possibly at the expense of a modest increase in insertion loss. As depicted in Fig. 6(c), the reflection coefficients ( $\mathrm{S}_{11}$) when the output port is active, alongside the forward transmission ( $\mathrm{S}_{21}$) during the output port’s inactive state, offer valuable insight attributed to the matching and associated losses.

As shown in the microphotograph of the final layout in Fig. 7, an additional transmission line was added at the common node to address probe positioning constraints in the measurement system. To minimize chip area, the transmission lines were reshaped, with electromagnetic simulations applied to ensure design performance within the desired response range.

Figure 7.

Microphotograph of the SPDT switch. The size, without additional lines for testing $\approx 3.1 \times 1.0\ \mathrm{mm}^2$, with access lines $\approx 3.1 \times 1.8\ \mathrm{mm}^2$.

In order to test under two-port measurement system conditions, the RF input and output (arm1) are equipped with RF and DC pads, while arm2 is terminated with an integrated 50Ω resistor. This setup requires arm1 to be tested for both port’s active and inactive conditions. However, HEMT devices in arm2 will still be biased complementary to arm1. When the port under test (arm1) is in the active state, D2 and D4 devices will be supplied with −30 V to maximize transmission, while D1 and D3 devices will be biased with 0 V to minimize reflection by diverting signals to the source via ground. The opposite biasing arrangement will be applied for the port-inactive scenario.

Small and large signal measurement

As depicted in Fig. 8(a), in order to prepare the test fixture, the SPDT die is mounted on a 5 mm thick aluminum base plate to assist with heat dissipation. An external PCB is also mounted on the same base plate to provide biasing to the MMIC. Although the devices are intended to be equally biased in pairs, four distinct launchers have been incorporated to increase flexibility for potential future tuning requirements. The wire bonding was performed using 25 μm thick gold wires to connect the MMIC to the PCB. Four high-frequency ceramic capacitors (100 pF/100 V) were positioned between the die and each launcher on the PCB. This arrangement simplifies the bond wiring process from the millimeter scale of the MMIC to the PCB’s centimeter scale, and also provides filtering of the DC bias.

Figure 8.

SPDT test fixture (a), small signal measurement system (b).

The measurement system set up to characterize small signal behavior uses a PNA Network Analyzer N5227B from the Keysight and MPI GSG 150 μm probes as depicted in Fig. 8(b). To compensate for the systematic errors introduced by measurement system components and to establish accurate reference standards, the measurement system is calibrated by performing a TRL (thru-reflect-line) calibration using a calibration kit on the same substrate.

As illustrated in Fig. 9(a), the achieved performance metrics ensure an insertion loss of better than −1.8 dB and isolation below −25 dB across a 2 GHz bandwidth around the center frequency of 30.5 GHz, under the active and inactive conditions, respectively.

In large signal measurement, the first step is to conduct a power sweep with the load fixed at 50Ω. To achieve saturation of the device at 30.5 GHz, a pre-amplifier (Spacek Labs SP313-35-38) and a power amplifier (Qorvo QPA2211B) were employed at the input. The SPDTs’ power handling has been determined by the input power corresponding to a maximum power gain compression of 0.1 dB in the active state and a maximum reflection coefficient magnitude of −20 dB in the inactive mode.

Figure 9.

Insertion loss and isolation versus frequency (a), power gain and input reflection coefficient versus input power in port’s active and inactive conditions (b).

To analyze the port in its active mode, the power gain was selected as the FoM to demonstrate the insertion loss and the compression over the sweeping rang at the design frequency. The power gain parameter is calculated from the extracted traveling wave components (a ₁, a ₂, b ₁, and b ₂). Figure 9(b) demonstrates that the SPDT maintains a low loss at power levels of up to 3 W, delivering a power gain better than −2 dB. In port’s inactive mode, the magnitude of the input reflection coefficients was selected as the FoM to represent the isolation capability of the SDPT under large signal characterization. Figure 9(b) shows the captured | $\Gamma_{\mathrm{IN}}$| responses remain below −20 dB for applied power levels of up to 2 W. It is evident in Table 2 that published SPDT devices often compromise specific figures of merit to improve other parameters. In contrast, the SPDT device developed in this study demonstrates consistently high performance across all evaluated metrics

(5)\begin{equation} \mathrm{Power\,Gain}\,\mathrm{[dB]}= P_{\mathrm{out}}\,\mathrm{[dBm]} - P_{\mathrm{inDel}}\,\mathrm{[dBm]}. \end{equation}

Table 2.

Comparison of the designed MMIC with published GaN MMIC SPDTs

LP measurement

The main goal of this study is to develop a switching network capable of effectively connecting with reactive components to ensure the best possible operation of OLMBAs. To achieve this objective, a low-loss SPDT was designed, fabricated, and tested at the specified frequency, meeting the necessary operating power level requirements. As discussed previously, due to the use of a two-port measurement system, one port of the SPDT was terminated with a 50Ω load during the design phase, leaving only one remaining port available for the connection to reactive components. Since the specific reactive terminations for the OLMBA were not known at the time of design, manual testing of iterations proved inefficient. Consequently, LP measurements were utilized as a comprehensive method to simulate a wide range of reactive terminations and record the SPDT’s response under varying load conditions. This approach offers valuable insights into the SPDT performance across the entire Smith chart when exposed to capacitive or inductive loads.

Figure 10 depicts the employed passive LP measurement system and its block diagram with PNA-X Network Analyzer N5247B from Keysight, passive on-wafer Delta M67100 tuner from focus, and MPI’s 150 μm GSG (T67A) probes. The passive tuner is programmed to define 136 unique loads, including the 50Ω, with 6 magnitudes arranged in a circular pattern across the Smith chart.

Figure 10.

The passive load-pull measurement system at CSA Catapult (a), the block diagram of the same system (b).

Figure 11 shows the reflection coefficient measured at the input of the SPDT ( $\Gamma_{\mathrm{IN}}$, blue circles) when load-pulling, while black circles correspond to the output loads set ( $\Gamma_{\mathrm{L}}$), for the swept input powers at 30.5 GHz. Figure 11(a) shows the case where the SPDT is switched to $\mathrm{RF}_{2}$, which means that the $\mathrm{RF}_{1}$ port (arm1) is in inactive condition. In this mode, ideally, load-pulling the $\mathrm{RF}_{1}$ port should not have any effect on $\Gamma_{\mathrm{IN}}$ as $\mathrm{RF}_{1}$ is isolated from the input. Figure 11(a) confirms this as it shows a 50Ω at all power levels for all defined output loads ( $\Gamma_{\mathrm{L}}$). Such a response originates from arm2 being terminated at 50Ω. The slight mismatches of captured $\Gamma_{\mathrm{IN}}$s and the 50Ω attributes to the loss associated with the network. This provides additional information compared to what presented in Fig. 9(b) to demonstrate the SPDT’s high isolation capability.

Figure 11.

$\Gamma_{\mathrm{IN}}$ (blue circles) versus $\Gamma_{\mathrm{L}}$ (black circles) included with power sweeps for port’s inactive condition (a), port’s active condition (b).

Figure 11(b) shows the results for the port’s active condition. The insertion loss of the switch leads to a reduction in the magnitude of the reflection coefficient, which can be achieved at the input of the switch. In addition, the response is asymmetrical, with the highest magnitude achieved for low inductive impedances. The worst case is the capacities of the fourth quadrant in the Smith chart, which also exhibits the most significant variations versus power sweep, which can also be observed in Fig. 12 where the magnitude of $\Gamma_{\mathrm{IN}}$ is shown versus the input power for all the loads tested. Figure 11(b) expresses the challenges associated with the introduction of purely reactive components, recapturing the $\mathrm{jX}_{1}$ with the same characteristics and the number of potential iterations required to determine the optimal jX. The position in the Smith chart of the best and worst loading can be arbitrarily changed by adjusting the length of the input line. The asymmetry in the SPDT response can be attributed to the asymmetric behavior of the elemental switch, as discussed in [Reference Ghozati, Quaglia, Azad, Powell, Tasker and Cripps5]. The abovementioned underscores the importance of LP data. Moreover, the LP data will be leveraged in future work to develop a comprehensive large-signal model of the tested SPDT. This model will be pivotal in optimizing the final OLMBA design within computer-aided design tools, ensuring accurate performance prediction under real-world operating conditions.

Figure 12.

$\Gamma_{IN}$ variations at different power levels with various loads.