Introduction

Noise is one of the most critical issues in wireless systems because it is a fundamental limiting factor for the performance of microwave receivers. Industry requirements for increasingly higher performing communication systems require tighter noise specifications that make the noise figure measurement a critical step in the characterization of modern microwave circuits and systems.

Noise figure measurements of circuits and sub-systems have been traditionally performed with noise figure meters specifically developed for that purpose. A paradigmatic example is the HP8970 (and associated family) that was considered for years as the reference meter for noise figure characterization. This instrument, as well as other modern equipment, uses the popular Y-factor technique to compute the noise figure from the ratio of two power measurements (“cold” and “hot”). The scalar nature of the measurements allows an easy and straightforward characterization process. This simplicity is undoubtedly part of its large success. However, its accuracy is limited by the match properties of the device under test and measurement setup.

There are two factors that have been driving an evolution in the noise figure characterization schemes. One factor is a growing tendency in microwave instrumentation to integrate different types of measurements into a single instrument box. As a result, noise figure characterization is now available as an option in modern vector network analyzers (VNA) from different manufacturers. The other factor is that the accuracy requirements in environments that are not perfectly matched (millimeter wave and beyond, on-wafer setups, etc.) demand a noise figure characterization that takes advantage of vector measurements to improve scalar results.

Analog versus high-frequency circuit design

Analog ICs are characterized by the common use of:

• differential stages with active loads,

• DC-coupled broadband amplifiers (i.e. no DC-blocking capacitors are present between stages),

• strong impedance mismatch between stages,

• input and output impedance matching based on negative feedback or resistors.

At the same time, analog designers work with:

• currents,

• voltages,

• transistors,

• capacitors, and

• resistors,

while employing small signal AC, noise, and transient large signal simulations to analyze the performance of their circuits. In contrast, traditional microwave circuit design deals with:

• single-ended stages with a small number of transistors,

• AC-coupled, tuned narrowband or broadband gain stages,

• reactive components such as inductors, transformers, capacitors, and transmission lines, and

• lossless impedance matching to maximize power gain and minimize noise figure.

A study of phase noise

In this section we look into how phase noise arises from noise currents in an oscillator, using an analytic power series model. An analysis is conducted based on this power series model, and this is used to predict the phase noise of an oscillator. This circuit is then made to oscillate with transient simulation and is studied for its phase noise performance with the harmonic balance method using a proprietary simulator (ADS). The results are then compared. The basis of this study will be a half circuit test bench of a Colpitts oscillator as in Figure 10.14(a) and Figure 10.41 of Chapter 10, but with a HBT instead of a MOSFET.

The topic of phase noise was introduced in Section 10.1.4 of Chapter 10. Equation (10.15) simply assumed a phase noise existing at a frequency offset from the fundamental oscillation frequency, but does not explain how this phase noise arises from real physical noise current sources (e.g. resistors, lossy inductors, transistor shot noise, etc.) present inside the oscillator circuit. The latter is studied in more detail in this Appendix using a one-port equivalent circuit for the oscillator, as shown in Figure A10.1.

The inductor, Lpt , is assumed in parallel with a resistor Rpt, at the base input of the transistor. (An equivalent series L-R representation is also possible.) One end of this inductor is placed at the desired DC base bias voltage of the transistor. The value of Rpt is calculated based on the assumed Q of an actual linear inductor, at the oscillation frequency. The resistor Rpt is shown inside the “one-port” as illustrated in Figure A10.1. When this assembly is in steady-state oscillation, the input to the one-port must by definition be purely capacitive because the net negative resistance created inside the oscillator must balance any sources of positive resistance. Note that in the Colpitts oscillator the transistor inside the one-port does not have its emitter connected to ground, so the subsequent analysis of the one-port is of the prototype structure of this oscillator, not just of the proprietary device models included in it.

Wireless and fiber-optic communication systems

Communication systems transfer information between two points (point-to-point) or from one point to multiple points (point-to-multi-point) located at a distance from each other. The distance may be anywhere from a few centimeters in personal area networks (PAN), to a few thousand kilometers in long-haul optical fiber communication systems. The information can be conveyed using carrier frequencies and energies occupying the audio, microwave, mm-wave, optical, and infrared portions of the electromagnetic spectrum. In this book, we refer to the range spanning GHz to hundreds of GHz as high-frequency. Although optical frequencies do not fall into this category, the baseband information content of most current fiber-optic systems covers the frequency spectrum from DC to tens of GHz. This makes the circuit topologies and design methodologies discussed in this book applicable to the electronic portion of fiber-optic systems.

Wireless versus fiber systems

Figure 2.1 illustrates the block diagrams of typical wireless and fiber-optic communication systems. They both consist of a transmitter and a receiver, a synchronization block, and a transmission medium. The information signal modulates a high-frequency (GHz to hundreds of GHz) or optical (hundreds of THz) carrier which is transmitted through the air, or through an optical fiber, to the receiver. The receiver amplifies the modulated carrier and extracts (demodulates) the information from the carrier. In both cases, an increasing portion of the system is occupied by analog-to-digital converters (ADC), digital to analog converters (DAC), and digital signal processors (DSP), operating with clock frequencies extending well into the GHz domain.

What is a tuned power amplifier?

Tuned power amplifiers are key components in the transmission path of wireless communication systems and in automotive radar. They typically deliver the power required for transmitting information to the antenna with high efficiency and, usually, high linearity, over bandwidths of 10% to 20% relative to the center frequency of the amplifier. For battery-operated applications in particular, minimum DC power consumption at a specified output power level is required.

As shown in Figure 6.1, in its idealized representation, a tuned power amplifier consists of a common-emitter or common-source (very large) transistor operating under large signal conditions with large output voltage swing. The transistor drain/collector is biased through a bias T (which presents an infinite inductor to the power supply and an infinite capacitor towards the load) and is loaded with a parallel resonant tank (formed by RL, C1, L) at the frequency of interest. For the sake of simplicity, we will assume that the transistor output capacitance, Cout = Cds + Cgd or Cbc + Ccs, is absorbed in the load capacitance C1. In a similar manner, RL includes the loss resistance of inductor L1 and capacitor C1. The circuit draws DC power from the supply to amplify the input signal power and deliver it to the load. Ideally all of the DC power and the input signal power should be converted to output signal power. In practice, at least some of the DC power is dissipated as heat.

What is a high-frequency SoC?

Although a precise definition is difficult to formulate, we define a high-frequency SoC as a single-chip radar, sensor, radio or wireline communication transmitter, receiver or transceiver that includes all high-frequency blocks, sometimes even the antennas, along with digital control and signal-processing circuitry.

Examples include:

• 2GHz cell-phone or 5GHz wireless LAN transceivers

• 40Gb/s or 100Gb/s SERDES

• 60GHz radio transceiver

• 77GHz automotive radar transceiver

• W-, D-, and G-Band active and passive imagers.

DESIGN METHODOLOGY FOR HIGH-FREQUENCY SoCs

Most foundries have recently decided that the MOSFET and SiGe HBT compact models should capture the parasitic capacitance and resistance of only the first 1–2 metal layers, the minimum required for contacting all the device terminals. The rationale invoked is that this approach allows circuit designers more flexibility in the physical layout of transistors and of commonly encountered transistor groupings such as interdigitated differential pairs, interdigitated Gilbert cell quads, and latches. One (major) impediment is that, since most of the backend parasitics are not accounted for in schematic-level simulations, the burden is passed on to the designer to first lay out and then extract the parasitic impedance of the full wiring stack above the transistor in order to get an accurate simulation of circuit performance. This, in turn, creates a problem since, in most cases, the design starts with schematic-level simulations to find the optimal transistor size.

The field of monolithic microwave integrated circuits (MMICs) emerged in the late 1970s and early 1980s with the development of the first GaAs MESFET and pseudomorphic high electron mobility transistor (p-HEMT) IC technologies and started to thrive in the mid-to-late 1990s once the performance of silicon transistors became adequate for radio frequency (RF) applications above 1GHz. Since then, CMOS, SiGe BiCMOS, and III-V HEMT, and heterojunction bipolar transistor (HBT) technology scaling to nanometer dimensions and THz cutoff (fT ) and oscillation frequencies (fMAX ) has continued unabated. Despite the increasing dominance of CMOS, each of these technologies has carved its own niche in the high-speed, RF, microwave, and mm-wave IC universe. Today’s nanoscale 3-D tri-gate MOSFET is a marvel of atomic-layer and mechanical strain engineering with more “exotic” materials, heterojunctions, and compounds than any SiGe HBT or III-V device. Indeed, InGaAs and Ge are expected to displace silicon channels in “standard” digital CMOS technology sometime in the next five to ten years. More so than in the past, it is very important that high-frequency circuit designers be familiar with all these high-frequency device technologies.

Apart from the general acceptance of CMOS as a credible RF technology, during the last decade “digital-RF” has radically changed the manner in which high-frequency (HF) circuit design is conducted. Traditional RF building blocks such as low-noise amplifiers (LNAs), voltage-controlled oscillators (VCOs), power amplifiers (PAs), phase shifters, and modulators have greatly benefited from this marriage of digital and microwave techniques and continue to play a significant role well into the upper mm-wave frequencies. New, digital-rich, radio transceiver architectures have emerged based on direct RF modulators and IQ power DACs, fully digital PLLs, and digitally calibrated phased arrays.