This book may be used as a textbook for the first or second year graduate student who is studying concurrently such topics as theory of complex analysis, classical mechanics, classical electrodynamics, and quantum mechanics.

In a textbook on statistical mechanics, it is common practice to deal with two important areas of the subject: mathematical formulation of the distribution laws of statistical mechanics, and demonstrations of the applicability of statistical mechanics.

The first area is more mathematical, and even philosophical, especially if we attempt to lay out the theoretical foundation of the approach to a thermodynamic equilibrium through a succession of irreversible processes. In this book, however, this area is treated rather routinely, just enough to make the book self-contained.

The second area covers the applications of statistical mechanics to many thermodynamic systems of interest in physics. Historically, statistical mechanics was regarded as the only method of theoretical physics which is capable of analyzing the thermodynamic behaviors of dilute gases; this system has a disordered structure and statistical analysis was regarded almost as a necessity.

Emphasis had been gradually shifted to the imperfect gases, to the gas–liquid condensation phenomenon, and then to the liquid state, the motivation being to be able to deal with correlation effects. Theories concerning rubber elasticity and high polymer physics were natural extensions of the trend. Along a somewhat separate track, starting with the free electron theory of metals, energy band theories of both metals and semiconductors, the Heisenberg–Ising theories of ferromagnetism, the Bloch–Bethe–Dyson theories of ferromagnetic spin waves, and eventually the Bardeen–Cooper–Schrieffer theory of super-conductivity, the so-called solid state physics, has made remarkable progress.

Introduction

New devices can now be realized with thin crystalline epitaxial layers of different semiconductors. These epitaxial layers can be as thin as a few lattice parameters; where this occurs, quantum effects become dominant. In the previous chapter we developed a quantum formalism, the generalized Wannier picture, for the analysis of quantum heterostructures. In particular, this formalism was shown to account for both the periodicity in k space of the band structure and its spatial variation. Armed with these tools we shall now study a variety of quantum devices, literally taking the electrons through different aerobic exercises. We will start with the fundamental problem of an electron in a band which is accelerated by a uniform electric field. Both stationary and time-dependent states will be discussed. Next, we will study the confinement of electrons in quantum wells and the formation of a two-dimensional electron gas (2DEG). We will then place a quantum well between two barriers and study the resonant tunneling of electrons through this system. Finally, we will study the diffraction of electrons in periodic or aperiodic structures called superlattices.

Before starting we must mention that the observation of quantum effects in devices requires that the electron wave-function (here the Wannier envelope) interacts coherently within the device heterostructure. This is possible if the electron's mean free path is large compared with the main features of the device heterostructures. Usually this criterion is met for structures smaller than 200 Å. An in-depth study of the impact of scattering upon the electron wave-function will be given in Chapter 6.

Introduction

The gate resistance Rg (Figure 15.16) has long been recognized as a very important parasitic parameter that can be difficult to reduce to an acceptable value. Rg degrades the noise figure and power gain. For the field-effect transistor (FET) depicted in Figure 14.1, the gate and drain voltages (and source ground) are applied to metal pads outside the active FET area. The gate, drain and source metallizations carry the currents laterally in the yz-plane onto the active FET area, and deliver the currents in an essentially uniform fashion in the x direction to the semiconductor. For the source and drain this is typically not a problem because of their larger extension in the y direction, and the thick interconnect metallizations available (neither is shown in Figure 14.1, which only depicts the central core of the device). The source and drain resistances (Rs and Rd) are thus not limited by the metallization resistance, but by the contact and semiconductor components discussed in Section 14.6.2. The situation is different for the gate because of its much smaller extension in the y direction. Consequently, in order to reduce the gate resistance for submicron gates, much effort has gone into developing T-gate processes (Figure 14.1; Section 17.7). This chapter will show that there is much more to the gate resistance, and therefore that there are additional ways to reduce it. In particular, we will discuss an interfacial component which, in its purest form, is intimately tied to the mechanism responsible for Schottky-barrier formation.

Introduction

Epitaxial-layer, bipolar transistors are intrinsically well suited to high-frequency applications because their critical, physical dimensions are mainly in the direction of the semiconductor film growth, which can be controlled on a near-atomic scale. This is in contrast to field-effect transistors (FETs), where the critical dimension of gate length must be determined lithographically.

Among the family of bipolar transistors, heterojunction bipolar transistors (HBTs) are particularly attractive for operation at high frequencies because their employment of a wide-bandgap emitter allows a highly doped base region to be used without compromising the current gain [1]. With a highly doped base, the base width can be reduced while still maintaining an acceptable base resistance. A short base width leads directly to an improved cut-off frequency, fT, which, when coupled with the lower base resistance, leads to an improved oscillation frequency, fmax. These, and other, attributes of HBTs have been reviewed [2].

In this chapter, some important aspects of modeling high-performance HBTs are discussed. The aims are twofold: (i) to gain some insight into the workings of an HBT at the microscopic level; (ii) to use this insight to examine, or develop, analytical expressions which may be useful in the engineering design of high-frequency and high-speed devices.

At the microscopic level, the emphasis is on the collector current density, JC.

It is the trend in the silicon and compound microelectronic technology to continuously develop semiconductor circuits which are faster, smaller, and consume less power for a similar level of integration. This has been recently fueled in part by the rapid growth of digital wireless communication, which relies on both low-power high-speed digital and high-frequency analog electronics. As part of this trend, microwave, RF and IF analog and digital circuits are being integrated in ‘mixed-signal’ circuits for wireless applications. Both silicon and compound state-of-the-art integrated circuits presently rely on high-speed state-of-the-art submicron devices. However, research in microelectronic technology is always expanding its frontier; new heterostructure semiconductor materials and devices are continuously being developed or improved in a process often referred to as bandgap engineering. These heterostructure devices, in particular, and high-speed devices, in general, constitute the subject of this book. In this book we take the readers on a journey providing them with an understanding of both fundamental and advanced device-physics concepts as well as introducing them to the development of realistic device models which can be used for the design, simulation and modeling of high-speed electronics.

The journey in this book takes the reader from the fundamental physical processes taking place in heterostructures to the practical issues involved in designing highperformance heterostructure devices.

Ever shrinking high-speed devices

It is a basic requirement that high-speed devices must be small. Reducing the device reduces the transit-time and the capacitances in devices. The operating voltage is also reduced, and this helps with the reduction of the power dissipation.

Introduction

In Chapter 8 we studied the two-dimensional electron gas (2DEG) and its control with a gate electrode. As we shall see in Chapter 10, the 2DEG is used as the channel of a high-speed FET, the MODFET. We therefore need to develop a picture of horizontal transport in the 2DEG before studying the MODFET. The transport equations developed in this chapter will also be used for the analysis of the heterojunction bipolar transistor (HBT) in Chapter 18

Our analysis of transport in Chapters 4–7 assumed that the electron transport was mostly ballistic, i.e., the mean free path was longer than or comparable to the quantum device length. In this chapter we shall assume instead that the scale upon which the device variation takes place is large compared to the electron mean free path so that no appreciable quantum effects are expected. Indeed, multiple scattering events randomize the phase of the electron so that neglecting quantum interferences is a reasonable approximation in devices of length larger than 1000 Å. As a result a semiclassical analysis that describes the electrons as a gas of classical (known position and momentum) particles in a band (e.g., the conduction band) should be sufficient to study horizontal transport in submicron gate-length FETs (0.1–1 μm).

In this chapter we shall review the existing picture of transport developed for the three-dimensional electron gas (3DEG) based on the Boltzmann equation formalism. We will see, for example, how we can derive the semiclassical transport equations introduced in Chapter 2 for heterostructures.

Introduction

So far our study of quantum heterostructure devices in Chapter 4 has assumed that the devices were small compared to the mean free path of the electron. Transport in this type of device is referred to as ballistic transport. In real crystals the electron is always subjected to some type of scattering. In Chapter 6 we will study the impact of scattering on the electron wave-function and develop a simple three-dimensional quantum transport theory. In preparation for this analysis, we must first study the scattering mechanisms to which an electron is subjected.

Various scattering mechanisms exist in semiconductors. We will consider first scattering by the lattice vibrations, and, in particular, discuss polar, acoustic, and intervalley scattering. Next, we will turn our attention to scattering processes specific to heterostructures and discuss interface roughness scattering and alloy scattering. Finally, we will conclude this chapter with a discussion of electron–electron scattering.

Note that quantum heterostructures such as resonant tunneling diodes (RTDs), superlattices, and quantum wells (e.g., modulation doped field-effect transistors (MODFETs)) are usually undoped to minimize impurity scattering. Therefore impurity scattering is usually small compared to polar scattering and interface roughness scattering.

Phonons and phonon scattering

A crystal can be represented as a network of masses connected by springs. The masses are the atoms and the springs the covalent bonds between the atoms (see Figure 5.1).

Introduction

The design and simulation of microwave circuits with a circuit simulator requires the availability of fast and accurate models for all components in the circuit. From a design perspective, the reliability of the simulations of microwave circuits is usually limited by the device models that are available in the computer simulation tools used. Accurate and computationally efficient device models, that are easy to extract from measured data and can easily be incorporated into a circuit simulator, are therefore needed to improve and speed up the design of high-frequency circuits.

Although a model can come close, it can never exactly reproduce the performance of a device. Hence it is important to realize that the modeling effort may need to be tailored towards the kinds of circuits being simulated. This can be very important given the fact that not only accuracy, but also speed and convergence are important factors that need to be addressed.

In this chapter, we will present the methodology for the development of a universal field-effect transistor (FET) model for the DC, thermal and microwave modeling of three-terminal FET devices using some of the results derived in Chapter 11. Universal models are models that are applicable to a wide range of technologies. In this chapter we focus on the application of the universal microwave FET models to: (1) SOI (silicon on insulator) MOSFETs [1] for low-power RFIC integrating RF and digital circuitry on a single chip, and (2) LD MOSFETs [2] (laterally diffused MOS) for high-power, linear amplification.

Introduction

Of the various three-terminal devices proposed or demonstrated over the last couple of decades, the modulation doped field-effect transistor (MODFET) (or high-electronmobility transistor (HEMT)) and the heterojunction bipolar transistor (HBT) (Chapters 2, 18 and 19) are the most successful. The two-terminal resonant tunneling diode (RTD) (Chapters 4 and 6) is also of great interest because of the extremely compact low-power high-speed digital circuitry it makes possible when integrated, for instance, with HEMTs (see e.g. [1]). Table 14.1 shows, for several transistor technologies, representative values (1999) for circuit frequency range, device cut-off frequencies, off-state breakdown voltage, maximum output power, power-added efficiency and noise figures with associated gain. The SiGe HBT is very attractive because of the potentially low cost of manufacturing and cut-off frequencies high enough for most wireless applications. For applications in a similar frequency range that require larger microwave output power, the GaAs-based HBT is an even better candidate. This device also shows very low 1/ƒ noise, which translates into low oscillator phase noise. In addition to its speed, one advantage of the InP-based HBT is its surface properties which allow smaller devices. When special processing techniques are employed such down-scaling can result in very impressive power-gain cut-off frequency and circuit performance [2, 3].

When high frequencies and low noise are required the device of choice is typically a III–V Schottky-barrier-gate field-effect transistor FET (SBGFET), several examples of which appear in Table 14.1.