In this chapter, we present some general compact model optimization and passivity enforcement algorithms. Model optimization can be viewed as a fitting-based model generation process, where we fit a parameterized model against the simulated or measured data of original circuits. Model optimization methods can be applied to more general modeling applications like modeling RF and microwave circuits where it is difficult to obtain the models directly from the structures of the circuits. Instead, engineers typically model those circuits by fitting full-wave simulation or measured data. One critical issue in such applications is the preservation of some important circuit properties like passivity and reciprocity.

In this chapter, we introduce some efficient model optimization and passivity enforcement methods, as well as some reciprocity-preserving modeling methods developed in recent years.

Passivity enforcement

In this section, we present the state-space based passivity enforcement method, which is based on the method used in [21], but we will show how this method can be used in the hierarchical model order reduction framework to enforce passivity of the model order reduced admittance matrix Ỹ(s).

Passivity is an important property of many physical systems. Brune [12] has proved that the admittance and impedance matrices of an electrical circuit consisting of an interconnection of a finite number of positive R, positive C, positive L, and transformers are passive if and only if its rational function are positive real (PR).

Introduction

In the chapter, we introduce another structure-preserving model order reduction method, which extends the SPRIM method [37] to more general block forms while the 2q moment-matching property is still preserved. The SPRIM method partitions the state matrix in the MNA (modified nodal analysis) form into natural 2 × 2 block matrices, i.e., conductance, capacitance, inductance, and adjacent matrices. Accordingly, the projection matrix is partitioned. As a result, SPRIM matches twice the moments of the models by using the projection matrix given by PRIMA. The reduced models also preserve the structural properties of the original models like symmetry (reciprocity). This idea has been extended to deal with more partitions by block structure-preserving model order reduction (BSMOR) [136], as shown in Chapter 8 to further exploit the regularity of the many parasitic networks. It was shown that by introducing more partitions, more poles are matched and this leads to more accurate order-reduced models [138].

However, the BSMOR method simply introduce more partitions or blocks; it does not truly preserve the circuit structures for general RLCK circuits for different input sources (voltages or currents). The reduced model does not match the 2q moments of the original models, as SPRIM does.

In this chapter, we first show theoretically that structure-preserving model order reduction can be applied to RLCK admittance networks, which are driven by voltage sources and requires partitioning of the original MNA circuit matrix into 2 × 2 block matrices.

In this chapter, we focus on passive wideband modeling of RLCM circuits. We propose a new passive wideband reduction and realization framework for general passive high-order RLCM circuits. Our method starts with large RLCM circuits, which are extracted by existing geometry extraction tools like FastCap [83] and FastHenry [59] under some relaxation conditions of the full-wave Maxwell equations (like electro-quasi-static for FastCap or magneto-quasi-static for FastHenry) instead of measured or simulated data. It is our ultimate goal that we can obtain the compact models directly from complex interconnect geometry without measurement or full-wave simulations. The method presented in this chapter is called hierarchical model order reduction, HMOR, which is based on the general frequency-domain hierarchical model reduction algorithm [121, 122, 124] and an improved VPEC (vector potential equivalent circuit) [134] model for self and mutual inductance, which can be easily sparsified and is hierarchical-reduction friendly.

The HMOR method achieves passive wideband modeling of RLC circuits via multi-point expension and the convex programming based passivity enforcement method. In this section, we will show that the frequency-domain hierarchical reduction is equivalent to implicit moment-matching around s = 0, and that the existing hierarchical reduction method by one-point expansion [121, 124] is numerically stable for general tree-structured circuits.

Introduction

Model order reduction methods for linear and non-linear dynamic systems in general can be classified into two categories [6]:

1. Singular-value-decomposition (SVD) based approaches

2. Krylov-subspace-based approaches.

Krylov-subspace-based methods have been reviewed in Chapter 2. In this chapter, we focus on the SVD-based reduction methods. Singular value decomposition is based on the lower rank approximation, which is optimal in the 2-norm sense. The quantities for deciding how a given system can be approximated by a lower-rank system are called singular values, which are the square roots of the eigenvalues of the product of the system matrix and its adjoint. The major advantage of SVD-based approaches over Krylov subspace methods lies in their ability to ensure the errors satisfying an a-priori upper bound. Also, SVD-based methods typically lead to optimal or near optimal reduction results as the errors are controlled in a global way. However, SVD-based methods suffer the scalability issue as SVD is a computational intensive process and cannot deal with very large dynamic systems in general. In contrast, Krylov-subspace-based methods can scale to reduce vary large systems due to efficient computation methods for moment vectors and their orthogonal forms.

SVD-based approaches consist of several reduction methods [6]. In this chapter, we mainly focus on the truncated-balanced-realization (TBR) approach and its variants, which were first introduced by Moore [81].

Complexity reduction and compact modeling of interconnect networks have been an intensive research area in the past decade, owing to increasing signal integrity effects and rising electro and magnetic couplings modeled by parasitic capacitors and inductors. Most previous research works mainly focus on the reduction of internal circuitry by various reduction techniques. The most popular one is based on subspace projection [32, 37, 85, 91, 113]. The projection-based method was pioneered by asymptotic waveform evaluation (AWE) algorithm [91], where explicit moment matching was used to compute dominant poles at low frequency. Later on, more numerical stable techniques were proposed [32,37,85,113] by using implicit moment matching and congruence transformation.

However, nearly all existing model order reduction techniques are restricted to suppress the internal nodes of a circuit. Terminal reduction, however, is less investigated for compact modeling of interconnect circuits. Terminal reduction is to reduce the number of terminals of a given circuit under the assumption that some terminals are similar in terms of performance metrics like timing or delays. Such reduction will lead to some accuracy loss. But terminal reduction can lead to more compact models after traditional model order reduction has been applied to the terminal-reduced circuit, as shown in Figure 6.1.

For instance, if we use subspace projection methods like PRIMA [85] for the model order reduction, a smaller terminal count will lead to smaller reduced models, given the same order of block moment requirement for both circuits.

As VLSI technology advances with decreasing feature size as well as increasing operating frequency, inductive effects of on-chip interconnects become increasingly significant in terms of delay variations, degradation of signal integrity, and aggravation of signal crosstalk [72, 116]. Since inductance is defined with respect to the closed current loop, the loop-inductance extraction needs to specify simultaneously both the signal-net current and its returned current. To avoid the difficulty of determining the path of the returned current, the partial element equivalent circuit (PEEC) model [101] can be used, where each conductor forms a virtual loop with infinity and the partial inductance is extracted.

To model inductive interconnects accurately in the high frequency region, RLCM (M here stands for mutual inductance) networks under the PEEC formulation are generated from discretized conductors by volume decomposition according to the skin-depth and longitudinal segmentation according to the wavelength at the maximum operating frequency. The extraction based on this approach [59, 83, 84] has high accuracy but typically results in a huge RLCM network with densely coupled partial inductance matrix L. A dense inductively coupled network sacrifices the sparsity of the circuit matrix and slows down the circuit simulation or makes the simulation infeasible. Because the primary complexity is a result of the dense inductive coupling, efficient yet accurate inductance sparsification becomes a need for extraction and simulation of inductive interconnects in the high-speed circuit design.

The need for compact modeling of interconnects

As VLSI technology advances into the sub-100nm regime with increased operating frequency and decreased feature sizes, the nature of the VLSI design has changed significantly. One fundamental paradigm change is that parasitic interconnect effects dominate both the chip's performance and the design's complexity growth. As feature sizes become smaller, their electromagnetic couplings become more pronounced. As a result, their adverse impacts on circuit performances and powers will become more significant. Signal integrity, crosstalk, skin effects, substrate loss and digital and analog substrate couplings are now adding severe complications to design methodologies already stressed by increasing device counts. It was observed that today's high performance digital design essentially becomes analog circuit design [24] as there has been a need to observe a finer level of detail.

In addition to dominant deep submicron effects, the exponential increase of device counts causes a move in the opposite direction: we need to increase the increasing design abstraction levels to cope with the design capacity growth. It was widely believed that behavioral and compact modeling for the purpose of synthesis, optimization, and verification of the complicated system-on-a-chip are viable solutions to address these challenging design problems [66].

In this book, we focus on the compact modeling of on-chip interconnects and general linear time invariant systems (LTI) because interconnect parasitics, which are modeled as linear RLCM circuits, are the dominant factors for complexity growth.

In this chapter, we study the model order reductions on interconnect circuits with many terminals or ports. We show that projection-based model order reduction techniques are not very efficient for those circuits. We then present an efficient reduction method which combines projection-based MOR with a frequency domain fitting method to produce reduced models for interconnect circuits with large terminals.

Introduction

Krylov subspace projection methods have been widely used for model order reduction, owing to their efficiency and simplicity for implementation [32, 37, 85, 91, 113]. Chapter 2 has a detailed review of those methods.

One problem with the existing projection-based model order reduction techniques is that they are not efficient at reducing circuits with many ports. This is reflected in several aspects of the existing Krylov subspace algorithms like PRIMA [85]. First, the time complexity of PRIMA is proportional to the number of ports of the circuits as moments excited by every port need to be computed and matrix-valued transfer functions are generated. Second, the poles of the reduced models increase linearly with the number of ports, and this makes the reduced models much larger than necessary. The fundamental reason is that all the Krylov-based projection methods are working directly on the moments, which contain the information of both poles and residues for the corresponding transfer function.

Introduction

The integrated circuit industry has continuously enjoyed enormous success owing to its ever increasing large-scale integration. With the advent of system-on-a-chip (SOC) technology [30,133], it requires heterogeneous integration to support different modules within one single silicon chip such as logic, memory, analog, RF/microwave, FPGA, and MEMS sensor. Such a heterogeneous integration leads to highly non-uniform current distribution across one layer or between any pair of layers. As a result, it is beneficial to design a structured multi-layer and multi-scale power and ground (P/G) grid [11] that is globally irregular and locally regular [115] according to the current density. This results in a heterogeneously structured P/G circuit model in which each subblock can have a different time constant. In addition, the typical extracted P/G grid circuits usually have millions of nodes and large numbers of ports. To ensure power integrity, specialized simulators for structured P/G grids are required to efficiently and accurately analyze the voltage bounce or drop using macro-models.

In [139], internal sources are first eliminated to obtain a macro-model with only external ports. The entire P/G gird is partitioned at and connected by those external ports. Because elimination results in a dense macro-model, [139] applies an additional sparsification procedure that is error-prone and inefficient. In addition, [18,95] proposed localized simulation and design methods based on the locality of the current distribution in most P/G grids with C4-bumps.

The systematic use of differential forms in electromagnetic theory started with the truly remarkable paper of Hargraves [Har08] in which the space-time covariant form of Maxwell's equations was deduced. Despite the efforts of great engineers such as Gabriel Kron (see [BLG70] for a bibliography) the use of differential forms in electrical engineering is, unfortunately, still quite rare. The reader is referred to the paper by Deschamps [Des81] for an introductory view of the subject. The purpose of this appendix is to summarize the properties of differential forms which are necessary for the development of cohomology theory in the context of manifolds without getting into the aspects which depend on metric notions. We also develop the aspects of the theory that both depend on the metric and are required for Chapter 7. Reference [Tei01] presents most of the topics in this chapter from the point of view of the numerical analyst interested in network models for Maxwell's equations.

There are several books which the authors found particularly invaluable. These are [War71, Chapters 4 and 6] for a proof of Stokes’ theorem and the Hodge decomposition for a manifold without boundary, [Spi79, Chapters 8 and 11] for integration theory and cohomology theory in terms of differential forms, [BT82] for a quick route into cohomology and [Yan70] for results concerning manifolds with boundary. Finally, the papers by Duff, Spencer, Conner, and Friedrichs (see bibliography) are for basic intuitions about orthogonal decompositions on manifolds with boundary.