Introduction

Stress-induced atomic migration is creep as we have discussed in Chapter 10. We have emphasized that it is stress gradient not stress that can induce atomic diffusion. From the viewpoint of device reliability, we must ask the following questions. First, from where is the stress coming? Second, how does a stress gradient develop in an interconnect? Third, how can the elastic stress gradient induce atomic migration? Fourth, what is the mechanism of creep that leads to void or whisker formation to cause failure in interconnects? Finally what is the rate of creep [1–4]?

On the first question, typically the answer is thermal stress which occurs due to different thermal expansion coefficients in the interconnect structure. The most obvious one is that between Al (or Cu) metallic wire and the interlayer dielectric insulator. Another one comes from the chip-packaging interaction in flip-chip technology because of the large difference in thermal expansion between the chip and the packaging substrate. Then, electromigration can introduce back-stress in interconnects as discussed in Chapter 11, Section 11.6. Mechanical stress due to externally applied force is rare in electronic devices. However, we should mention impact-induced stress due to the dropping of a handheld device to the ground. The impact is a high rate shear in a very short time, about 1 millisecond, or a shear rate of 1 × 103 cm/s. Since impact failure is not a long-time event as in creep, we will not cover it here.

Introduction

When an inhomogeneous binary solid solution or alloy is annealed at constant temperature and constant pressure, it will become homogeneous to lower the free energy. Conversely, when a homogeneous binary alloy is annealed at constant pressure but under a temperature gradient, i.e. one end of it is hotter than the other, the opposite will happen: the alloy will become inhomogeneous, and the free energy increases. This de-alloying phenomenon is called the Soret effect, as mentioned in Chapter 10. It is due to thermomigration or mass migration driven by a temperature gradient [1–3]. Since the inhomogeneous alloy has higher free energy than the homogeneous alloy, thermomigration is an energetic process which transforms a phase from a low-energy to a high-energy state. It is unlike a conventional phase transformation which occurs by lowering Gibbs free energy.

In thermodynamics, under homogeneous external conditions defined by a constant temperature and constant pressure (for example, if T is fixed at 100 °C and p is fixed at atmospheric pressure), a thermodynamic system will minimize its Gibbs free energy, and it will move toward the equilibrium condition at the given T and p. Both enthalpy and entropy are state functions, so the Gibbs free energy of the equilibrium state is defined when T and p are given. On the other hand, if the external conditions are inhomogeneous, for example, having different temperatures at the two ends of a sample in thermomigration, the equilibrium state of minimum Gibbs free energy is unattainable.

Introduction

Thin films are not used as structural parts in electronic devices to carry mechanical loads. Nevertheless, stress or strain does exist commonly in thin films as a result of constraints imposed by their substrates. A thin film and its substrate generally have different thermal expansion coefficients, so stress is produced during temperature excursion in deposition and annealing. Stress in thin films is known to cause serious yield and reliability problems in microelectronic devices. Ni thin film is known to have a high tensile stress deposited by e-gun or by sputtering at room temperature. In epitaxially grown silicon or a silicon-germanium layer, stress can affect the mobility of the carriers, and stress is introduced in devices for the purpose. In this chapter, we shall discuss the nature of biaxial stress in thin films, and the measurement of biaxial stress in thin films using the wafer-bending method. The chemical potential in a stressed solid that affects atomic diffusion and the time-dependent response of a solid to applied stresses in creep or stress-migration will be covered in Chapter 14.

A piece of solid is under stress when its atoms are displaced from their equilibrium positions by a force [1–6]. The displacement is governed by the interatomic potential.

Introduction

Thin-film materials science is wafer-based and flux-driven. Up to now, most thin-film applications occur on devices built on semiconductor wafers. To process a microelectronic or opto-electronic device, the basic step consists of adding a monolayer of atoms on or subtracting it from a wafer surface. In these processes, we are not dealing with equilibrium states of materials; rather, we deal with kinetic states of a flux of atoms. Furthermore, for example, a p-n junction in a semiconductor is not at an equilibrium state. If we anneal the junction at a high temperature for a long time, it will disappear by interdiffusion of the p-type and n-type dopants. At device operation near room temperature, the dopants are supersaturated and frozen in place in the semiconductor to produce the electrical potentials, the built-in potentials, needed to guide the transport of charges. In doping a semiconductor, we need to diffuse or to implant a flux of atoms into the semiconductor to obtain the desired concentration profile of dopant. In device operation based on field effects, we pass an electric current or a flow of charge particles through the device to turn on or turn off the FETs. Thus, we consider flux-driven processes.

Generally speaking, we can have a flux or a flow of matter, a flow of energy (heat), or a flow of charge particles in a system. Indeed, in electronic devices, the operation can have all three kinds of flow coexist in the devices.

Introduction

Atomic diffusion or atomic rearrangement in thin films is the basic kinetic process in microelectronic device manufacturing and reliability. Pure Si is not useful until we can diffuse electrically active n-type and p-type do pants into it. In fact, the fundamental behavior of a transistor, i.e. the p–n junction in silicon, is obtained by a non-uniform distribution of both n- and p-type do pants in Si in order to achieve the built-in potential which guides the motion of electrons and holes in the transistor. Thus, the diffusion of do pants in Si has been a very important subject in microelectronics, both in device characteristics and in device manufacturing. Indeed, there are some very sophisticated programs to simulate and to analyze the do pant diffusion profile in junction formation in Si devices.

In classical metallurgy, a blacksmith inserts a bar of iron into a charcoal furnace to allow the gas phase of carbon to diffuse into the iron. The diffusion time is typically short, just several minutes' heating in the furnace, so the blacksmith has to take out the red-hot bar and hammer it in order to homogenize the carbon in the bar. This process of “heat and beat” is to diffuse and to redistribute carbon in iron to make the Fe–C alloy.

In this chapter, we shall connect microscopic atomic jumps in a crystalline lattice to macroscopic diffusion behavior as described by the Fick's first and second laws.

Introduction

Layered thin-film structures are used in microelectronic, opto-electronic, flat panel display, and electronic packaging technologies. A few examples are given below. Very large-scale integration (VLSI) of circuits on computer chips are made of multilayers of interconnects of thin metal films patterned into submicron-wide lines and vias. Semiconductor transistor devices rely on the growth of epitaxial thin layers on semiconductor substrates, such as the growth of a thin layer of p-type Si on a substrate of n+-type Si [1–3]. The gate of the transistor device is formed by the growth of a thin layer of oxide on the semiconductor. Solid-state lasers are made by sandwiching thin layers of light-emitting semiconductors between layers of a different semiconductor. In electronic and optical systems, the active device elements lie within the top few microns of the surface; this is the province of thin-film technology. Thin films bridge the gap between monolayer (or nanoscale structures) and bulk structures. They span thicknesses ranging from a few nanometers to a few microns. This book deals with the science of processing and reliability of thin films as they apply to electronic technology and devices [4]. To begin, this chapter describes the application of thin films to modern advanced technologies with examples.

Introduction

Surface kinetic processes deal with nucleation, growth, and ripening processes on a surface from the point of view of atomic absorption, desorption, and diffusion on the surface. The surface of a thin film, more specifically the surface of a single crystal, is the starting place for these processes. The single-crystal surface has a microscopic structure associated with crystallographic structure and symmetry and reconstruction, as well as a macroscopic structure associated with surface steps, kinks, and other surface defects [1–4]. Surface chemical reaction such as oxidation is not considered here.

In Chapter 3, there was a brief discussion of surface crystallographic structure. A ball-and-stick crystal model could depict a (100) surface of silicon, the cubic face of a diamond lattice, as a portion of a plane of infinite extent consisting of a square array of atoms. Each of these atoms has two unpaired electron bonds. On a (100) surface of silicon, the atoms displace laterally (as shown schematically in Fig. 3.12) to satisfy the bonding requirement. Such surfaces are called “reconstructed.”

On a larger scale, single-crystal surfaces can contain terraces, steps, kinks, and other defects. As shown in Fig. 7.1, the step spacing is associated with the miscut of the crystal. The miscut angle is the angular difference between a crystal plane and the mechanical surface of the crystal established when an ingot is cut. Under production conditions this angle is about 0.1°. The relationship shown in the figure relates the step spacing L0 to the miscut angle.

Introduction

Surface energy is an underlying concept in understanding thin-film process. By definition, thin film has a very large surface-to-volume ratio. Surface energy controls the nucleation as well as the heterogeneous epitaxial growth processes. It also plays a key role in many applications of thin films, for example, in MEMS devices. Generally speaking, surface energy is the extra energy expended to create a surface, so surface energy is positive. It is important to know that metals have high surface energies and oxides have low surface energies, so a native oxide can grow on a metal.

The surface energy determines whether or not one material wets another and forms a uniform adherent layer as in heterogeneous epitaxial growth. A material with a very low surface energy will tend to wet a material with a higher surface energy so that epitaxial growth is possible. On the other hand, if the material to be deposited has a higher surface energy than the substrate surface, it tends to form clusters (“ball up”) on the low-surface-energy substrate. The epitaxial growth of a superlattice structure of ABABAB requires that in addition to a good lattice parameter match between A and B, the surface energy of A and B should be nearly the same. There is a well-known wetting principle that if A wets B, B will not wet A but ball up on A. In order to have A wetting B and B wetting A in growing the superlattice, their surface energies should be the same.

The book is intended as a textbook for first and second year graduate students in the Department of Materials Science and Engineering. It can also be used as a reference book for self-study by engineers in the microelectronic industry. The early chapters in this book evolve from Electronic Thin Film Science, by K. N. Tu, J. W. Mayer, and L. C. Feldman, and published by MacMillan in 1993. The contents of this book have been taught in a graduate class on “Thin film materials science” at UCLA for over 15 years.

The emphasis in thin-film research is twofold: (1) to invent or to process new thin-film materials having useful functions in applications, and (2) to improve the reliability of functional thin films in large-scale applications, for example, in consumer electronic products. To achieve these goals, on the basis of the discipline of thin-film materials science, requires the study of correlation among structure—properties—processing—performance—reliability of thin films. There are textbooks on the processing of thin films, such as deposition methods by sputtering, electroplating, and MBE growth. There are also textbooks on characterization techniques such as SEM, TEM, RBS, XPS, UPS, Auger, and STM, etc. However, there is no textbook on thin-film reliability science.

When a technology is mature and in mass production, and has widespread application, reliability issues become crucial. As the trend of miniaturization of electronic devices moves into the nanoscale region, the reliability concern of nanotechnology will become serious in the near future.

Introduction

While electromigration is the most persistent reliability problem in interconnects of microelectronic devices, it does not necessarily lead to microstructure failure. In interconnect regions where electromigration is uniform and steady, there may not be microstructure damage. While atoms are being driven from the cathode to the anode and vacancies are being driven in the opposite direction at the same time, no void or hillock occurs as long as the vacancy distribution is in equilibrium and the source and sink of vacancies are effective at the anode and the cathode, respectively. Only if vacancy distribution is not at equilibrium in electromigration will it lead to microstructure failure such as void and extrusion formation. The occurrence of these failures must involve atomic flux divergence and change in total number of lattice sites. It is a time-dependent reliability problem [1–5].

We have discussed in Chapter 11 that the Blech structure of short strips can show electromigration failure directly. This is because the short strips have the built-in divergence of atomic flux at the two ends, where atoms of Al cannot diffuse out of Al into the TiN-based line, nor from the TiN into the Al. Thus, atomic flux divergence is a necessary condition of electromigration-induced damage. Sometimes voids or hillocks are found in the middle of a strip where the electric current seems uniform, but they are due to flux divergence in the middle of the line caused by triple points of grain boundaries or other kinds of structural defect.

Introduction

In Chapter 1, Section 1.2, we discussed the operation of a metal-oxide-semiconductor FET. There are hundreds of millions or even billions of such transistors on a Si chip the size of a fingernail. To interconnect all these transistors by VLSI circuit technology, multilayers of thin-film interconnect wires made of Al or Cu were used. Electromigration is the most serious and persistent reliability problem in the interconnect structure on a Si chip in microelectronic technology. This is because typically a current density of 105 to 106 A/cm2 is conducted by the thin-film wires. Under such high current density, atomic diffusion and rearrangement are enhanced, leading to void formation in the cathode and extrusion in the anode of an interconnect. The void can become an open and the extrusion a short in the circuit. On the other hand, it is worth mentioning that there is no electromigration in an ordinary extension cord used at home and in laboratories. The electric current density in the cord is low, about 102 A/cm2, and also the ambient temperature or room temperature is too low for atomic diffusion to occur in the copper wire in a cord.

The free electron model of conductivity of metals assumes that the conduction electrons are free to move in the metal, unconstrained by the perfect lattice of atoms except for scattering due to phonon vibration and structural defects such as grain boundaries, dislocations, and vacancies in the lattice. The scattering is the cause of electrical resistance and joule heating.