Crossref Citations
This Book has been cited by the following publications. This list is generated based on data provided by Crossref.
Dimou, Georgios D.
Beerel, Peter A.
and
Lines, Andrew M.
2011.
Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation.
Vol. 6951,
Issue. ,
p.
92.
Ho, Weng-Geng
Chong, Kwen-Siong
Gwee, Bah-Hwee
Chang, Joseph. S.
and
Yee, Ming-Fatt
2011.
A power-efficient integrated input/output completion detection circuit for asynchronous-logic quasi-delay-insensitive Pre-Charged Half-Buffer.
p.
376.
GHAVAMI, BEHNAM
PEDRAM, HOSSEIN
and
SALARPOUR, AREZOO
2011.
LEAKAGE POWER REDUCTION OF ASYNCHRONOUS PIPELINES.
Journal of Circuits, Systems and Computers,
Vol. 20,
Issue. 02,
p.
207.
Beerel, Peter A.
Dimou, Georgios D.
and
Lines, Andrew M.
2011.
Proteus: An ASIC Flow for GHz Asynchronous Designs.
IEEE Design & Test of Computers,
Vol. 28,
Issue. 5,
p.
36.
Sia, Chee Yap
Rosdi, Bakhtiar Affendi
and
Lee, Ming Chew
2011.
Synchronous design of 8259 Programmable Interrupt Controller.
p.
195.
Ho, Weng-Geng
Chong, Kwen-Siong
Gwee, Bah-Hwee
Chang, Joseph S.
Sun, Yin
and
Chang, Kok-Leong
2011.
Improved asynchronous-logic dual-rail Sense Amplifier-based Pass Transistor Logic with high speed and low power operation.
p.
1936.
Golani, P
and
Beerel, P A
2011.
An area-efficient multi-level single-track pipeline template.
p.
1.
Moreira, Matheus T.
and
Calazans, Ney L. V.
2012.
Electrical characterization of a C-Element with LiChEn.
p.
583.
Jamadagni, Navaneeth
and
Ebergen, Jo
2012.
An Asynchronous Divider Implementation.
p.
97.
Ho, Weng-Geng
Chong, Kwen-Siong
Lin, Tong
Gwee, Bah-Hwee
and
Chang, Joseph S.
2012.
Energy-delay efficient asynchronous-logic 16×16-bit pipelined multiplier based on Sense Amplifier-Based Pass Transistor Logic.
p.
492.
Moreira, M. T.
Oliveira, C. H. M.
Porto, R. C.
and
Calazans, N. L. V.
2013.
Design of NCL gates with the ASCEnD flow.
p.
1.
Ghavami, Behnam
Raji, Mohsen
Pedram, Hossein
and
Tahoori, Mehdi B.
2013.
Design and Analysis of a Robust Carbon Nanotube-Based Asynchronous Primitive Circuit.
ACM Journal on Emerging Technologies in Computing Systems,
Vol. 9,
Issue. 1,
p.
1.
Saifhashemi, Arash
and
Beerel, Peter A.
2013.
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation.
Vol. 7606,
Issue. ,
p.
205.
Moreira, Matheus Trevisan
and
Laert Vilar Calazans, Ney
2013.
Voltage scaling on C-elements: A speed, power and energy efficiency analysis.
p.
329.
Kok-Leong Chang
Tong Lin
Weng-Geng Ho
Kwen-Siong Chong
Bah-Hwee Gwee
and
Chang, Joseph S.
2013.
A dual-core 8051 microcontroller system based on synchronous-logic and asynchronous-logic.
p.
3022.
Moreira, Matheus T.
Oliveira, Bruno S.
Moraes, Fernando G.
and
Calazans, Ney L. V.
2013.
Charge sharing aware NCL gates design.
p.
212.
Moreira, Matheus Trevisan
and
Calazans, Ney Laert Vilar
2013.
Design of standard-cell libraries for asynchronous circuits with the ASCEnD flow.
p.
217.
Karmazin, Robert
Otero, Carlos Tadeo Ortega
and
Manohar, Rajit
2013.
cellTK: Automated Layout for Asynchronous Circuits with Nonstandard Cells.
p.
58.
Moreira, Matheus T.
Oliveira, Carlos H. M.
Porto, Ricardo C.
and
Calazans, Ney L. V.
2013.
NCL+: Return-to-one Null Convention Logic.
p.
836.
Moreira, Matheus Trevisan
Oliveira, Carlos Henrique Menezes
Calazans, Ney Laert Vilar
and
Ost, Luciano Copello
2013.
LiChEn: Automated Electrical Characterization of Asynchronous Standard Cell Libraries.
p.
933.
