In the previous microcontroller labs you controlled the I/O ports directly to scan a matrix keyboard, programmed a timer to interrupt at regular intervals to output a sine wave at a specific frequency, and initiated SPI communications with a LCD display to show text messages. In this lab you are going to integrate these elements into a jukebox that plays children’s lullabies using an RTOS.

So far, we have been using (wasting?) one FPGA logic cell flip-flop to create each bit of RAM memory and one or more logic cells for each ROM bit. This is inefficient and, for anything more than a small memory array, could leave us without enough logic cells to implement the rest of our design or require a larger, more expensive device.

Available at https://LAoE.link/LAoE_Chapter_28O.pdf.

After configuring your breadboard for digital circuits, this lab invites you to look at integrated circuit logic gates; first examining their characteristics and foibles, then using them to carry out some Boolean logic operations.

Suppose you are faced with a signal that looks like that in : a signal of moderate frequency, polluted with some fuzz.

What problem do we meet today? We try to design a circuit that provides an output supply voltage that is constant despite fluctuations that may arise in both input voltage and output current loading.

This decoupling does not affect the behavior of the circuit, since the noise was harmless – but it does make the waveform prettier. (And we hope you are getting into the habit of always bypassing your power supplies in any case.)

In this chapter we meet circuits that remember states of binary signals. Such circuits can be more versatile than the merely combinational circuits that we met earlier. Computers and most of the other digital devices we rely on would not be possible without a way to remember past events.

We aim to apply MOSFETs to form gates capable of Boolean logic and to look at some such binary operations.

Our task today is to add to our microcontroller the ability to take in information. We also would like a way to store temporary information efficiently and to not only get accurate delays, but to get delays without tying up the CPU so it can do other work in the meantime.

We’ve grouped here some flip-flop configurations that you have not yet seen. Despite this section’s title, we don’t mean to disparage these circuits. They are extremely useful. We’ve included Verilog code to implement each of these circuit fragments.

This lab introduces you to the sordid truth about op-amps: they’re not as good as we said they were last time! Sorry. But after making you confront op-amp imperfections in the first exercise, §7L.1, we return to the cheerier task of looking at more op-amp applications. There, once again, we treat the devices as ideal.

In Chapter 12N we treat MOSFET switches and some of their applications. This note says a little more about both MOSFETs and the junction type, JFETs. You can safely ignore this note if you’re only concerned with MOSFET applications, as we are in our lab exercises.

There are a number of [relatively] low-cost, small FPGA breakout boards that will work with the exercises in this book.1 What sets the WebFPGA apart from the other choices is its development environment.

A flows through the movement (a coil that deflects in the magnetic field of a permanent magnet: seefor a sketch). The remaining current must bypass the movement; but the current through the movement must remain proportional to the whole current.

The advantage of using a real-time operating system (embOS in our case) becomes abundantly clear when you need to add features or modifications to an existing program. The natural partitioning of an RTOS application into individual tasks with limited communication channels makes modifying existing code not only much more contained, but also much less likely to introduce new bugs into working code.

This chapter looks at two complex applications of operational amplifiers, the PID (Proportional, Integral, Derivative) control loop and the Lock-in Amplifier. Each application could a fill chapter in itself and we don’t expect you to get through the notes and labs in a single session.