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Problem: convert a range of voltages to a range of digital codes. The complementary process – digital to analog – is intellectually less challenging and less various, but useful.
The MOSFET version – an alternative regulator design – allows you to try the new transistor type as you try the regulator. Both home-made regulators raise stability issues that you will recognize from your experience with Lab 9L’s “nasty oscillators.” This exercise is not realistic: you are not at all likely to design a regulator from parts; we hope, though, that designing one once will give you insight into how a linear regulator works.
Sounds simple, and it is. We will try to point out quick ways to handle these familiar circuit elements. We will concentrate on one circuit fragment, the voltage divider.
This lab is divided into two parts. In the first part everyone will add hardware and Verilog code to implement a four-digit multiplexed seven-segment display. In the second part, you will create something interesting with this display.
Early microcontrollers typically provided only a few built-in peripheral devices in addition to the CPU and memory that made them stand-alone devices. For example, the original version of the 8051 developed by Intel in 1980 included only two 16-bit timer/counters and a serial port (UART), in addition to the basic CPU, memory and I/O ports.
In this lab, we would like you to design the control logic for a reaction timer as a Finite State Machine and then implement it in several ways. You will first build the control logic FSM using flip-flops and combinational logic. Then you will replace the combinational logic with a ROM or RAM built from the WebFPGA.
This circuit, Fig. 16L.1, the most fundamental of flip-flop or memory circuits, can be built with either NANDs or NORs. We will build the NAND form. It is called an SR flip-flop or latch because it can be “Set” or “Reset.” In the NAND form it also is called a “cross-coupled NAND latch.”
The power used in a CMOS circuit is directly proportional to clock frequency. Current only flows into or out of a CMOS gate to charge or discharge the input gate-to-source capacitance when the input switches from low to high or visa-versa.
To do all of today’s lab is a challenge: the op-amp circuit is the most complex that you’ve built so far, and if some stage holds you up, you’re likely to run out of time. But that shouldn’t worry you. Only the differential amp (§5L.1) – not its conversion into an op-amp – is fundamental.
We have advertised the differential amp as just a pair of common-emitter amplifiers, and have promised you that there’s not much new to understand here: you can use what you know from the two earlier labs where you build C–E amps. But students have noticed some effects that are new: not what one might expect from experience with a single C–E amp.
Today we look first at one more benign use of positive feedback, an active filter, and then spend most of our time with circuits that oscillate when they should not. In this lab, of course, they “should,” in the sense that we want you to see and believe in the problem of unwanted oscillations. On an ordinary day, the oscillations that these circuits can produce would be undesirable, and would call for a remedy. Some of you have met these so-called “parasitic oscillations” in earlier labs.
A student asked a good, hard question, recently. I was stumped, till the answer struck me – more or less the way the apple is said to have bonked Newton on the head – next morning as I cycled to work.
The “Cortex Debug/Program Connector” is a standardized hardware interface used both to program the internal flash memory and to debug program code by single-stepping program instructions and reading and writing the internal registers of the CPU.