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Then the remainder of the lab is given to trying applications for the so-called analog switch or transmission gate: a switch that can pass a signal in either direction, doing a good job of approximating a mechanical switch – or, more precisely, the electromechanical switch called a relay.
In this lab you start by building both synchronous and ripple counters out of discrete flip-flops. You then move up from the modest “divide-by-four” to an 8-bit “fully synchronous” counter.
All the programs we have created so far follow the Arduino model of a set of initialization functions that execute once (akin to Arduino setup()) followed by a while(1) loop that executes forever (like the Arduino loop() function).
The Digital Project Lab is an open-ended two day lab session that gives you the opportunity to design and build something of moderate complexity using the WebFPGA and any of the components and techniques we have discussed in the course so far.
The PID control loop and the lock-in amplifier are each significant builds and we don’t expect you will be able to complete both of them in a single lab session. Feel free to do one, the other, or both as your time and interest permit.
We have noted elsewhere that all the op-amps we meet in this course use internal “frequency compensation” that makes them stable – at least, if we refrain from putting strange things within their feedback loops. Frequency compensation, surprisingly enough, means deliberate rolling-off of the amplifier’s gain.
Using functions to interface to hardware not only makes your code clearer, it also makes it easier to maintain. Consider the LED and switch connected to the Arduino I/O pins shown in Fig. 23S.1 below.
Problem: convert a range of voltages to a range of digital codes. The complementary process – digital to analog – is intellectually less challenging and less various, but useful.
The MOSFET version – an alternative regulator design – allows you to try the new transistor type as you try the regulator. Both home-made regulators raise stability issues that you will recognize from your experience with Lab 9L’s “nasty oscillators.” This exercise is not realistic: you are not at all likely to design a regulator from parts; we hope, though, that designing one once will give you insight into how a linear regulator works.
Sounds simple, and it is. We will try to point out quick ways to handle these familiar circuit elements. We will concentrate on one circuit fragment, the voltage divider.
This lab is divided into two parts. In the first part everyone will add hardware and Verilog code to implement a four-digit multiplexed seven-segment display. In the second part, you will create something interesting with this display.
Early microcontrollers typically provided only a few built-in peripheral devices in addition to the CPU and memory that made them stand-alone devices. For example, the original version of the 8051 developed by Intel in 1980 included only two 16-bit timer/counters and a serial port (UART), in addition to the basic CPU, memory and I/O ports.
In this lab, we would like you to design the control logic for a reaction timer as a Finite State Machine and then implement it in several ways. You will first build the control logic FSM using flip-flops and combinational logic. Then you will replace the combinational logic with a ROM or RAM built from the WebFPGA.