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Our task today is to add to our microcontroller the ability to take in information. We also would like a way to store temporary information efficiently and to not only get accurate delays, but to get delays without tying up the CPU so it can do other work in the meantime.
We’ve grouped here some flip-flop configurations that you have not yet seen. Despite this section’s title, we don’t mean to disparage these circuits. They are extremely useful. We’ve included Verilog code to implement each of these circuit fragments.
This lab introduces you to the sordid truth about op-amps: they’re not as good as we said they were last time! Sorry. But after making you confront op-amp imperfections in the first exercise, §7L.1, we return to the cheerier task of looking at more op-amp applications. There, once again, we treat the devices as ideal.
In Chapter 12N we treat MOSFET switches and some of their applications. This note says a little more about both MOSFETs and the junction type, JFETs. You can safely ignore this note if you’re only concerned with MOSFET applications, as we are in our lab exercises.
There are a number of [relatively] low-cost, small FPGA breakout boards that will work with the exercises in this book.1 What sets the WebFPGA apart from the other choices is its development environment.
A flows through the movement (a coil that deflects in the magnetic field of a permanent magnet: seefor a sketch). The remaining current must bypass the movement; but the current through the movement must remain proportional to the whole current.
The advantage of using a real-time operating system (embOS in our case) becomes abundantly clear when you need to add features or modifications to an existing program. The natural partitioning of an RTOS application into individual tasks with limited communication channels makes modifying existing code not only much more contained, but also much less likely to introduce new bugs into working code.
This chapter looks at two complex applications of operational amplifiers, the PID (Proportional, Integral, Derivative) control loop and the Lock-in Amplifier. Each application could a fill chapter in itself and we don’t expect you to get through the notes and labs in a single session.
Are we pushing the breathless pace of this course too far in proposing to dispose of Field Effect Transistors (FETs) in a day? We gave more time to bipolar transistors, and much more to operational amplifiers.
Today you will first build and test a simple RAM in the FPGA. You will then build a seven-segment decoder ROM and connect it to the output of the FPGA 74HC161 counter you designed in the last lab to show the count on an LED display.
You saw a DIP1 in the previous lab. Fig. 6L.1 shows another, this time an 8-pin mini-DIP, housing the operational amplifiers that we will meet in this and later labs.
Here is a method for spot-checking a suspected bad transistor: the transistor must look like a pair of diodes when you test each junction separately. But, caution: do not take this as a description of the transistor’s mechanism when it is operating: it does not behave like two back-to-back diodes when operating (the circuits of Fig. 4L.1, if made with a pair of ordinary diodes, would be a flop, indeed).