Motivation for verification
There is a great advantage in being able to verify the correctness of computer systems, whether they are hardware, software, or a combination. This is most obvious in the case of safety-critical systems, but also applies to those that are commercially critical, such as mass-produced chips, mission critical, etc. Formal verification methods have quite recently become usable by industry and there is a growing demand for professionals able to apply them. In this chapter, and the next one, we examine two applications of logics to the question of verifying the correctness of computer systems, or programs.
Formal verification techniques can be thought of as comprising three parts:
a framework for modelling systems, typically a description language of some sort;
a specification language for describing the properties to be verified;
a verification method to establish whether the description of a system satisfies the specification.
Approaches to verification can be classified according to the following criteria:
Proof-based vs. model-based. In a proof-based approach, the system description is a set of formulas Γ (in a suitable logic) and the specification is another formula ϕ. The verification method consists of trying to find a proof that Γ ⊢ ϕ. This typically requires guidance and expertise from the user.
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