Fundamentals of Modern VLSI Devices

In a quasisteady approximation, the mobile carriers in a forward-biased diode are assumed to follow the applied voltage instantaneously. This assumption is a good one for calculating the depletion-layer capacitance where the majority carriers are able to respond to the applied voltage virtually instantaneously. (See Section 2.1.4.8 for a discussion on majority-carrier response time.) However, the redistribution of minority carriers is through diffusion and recombination processes. These processes do not occur instantaneously, but on a time scale related to the minority-carrier lifetime or transit time. As a consequence, when a small signal is applied to a diode, the changes in the minority-carrier densities at different locations in the diode have different phases and cannot be lumped together and treated as a single entity. In this appendix, the diffusion capacitance is derived from a small-signal analysis of the current through a diode starting from the differential equations governing the transport of minority carriers (Shockley, 1949; Lindmayer and Wrigley 1965; Pritchard, 1967). The diffusion capacitance can also be obtained from a transmission-line analysis of a diode equivalent circuit (Bulucea, 1968).

Consider an n+–p diode with a time-dependent forward-bias voltage vBE (t) applied across it. The emitter is assumed to be wide, i.e., LpE << WE, where LpE is the hole diffusion length in the emitter and WE is the thickness of the emitter. The base is assumed to be narrow, i.e., LnB >> WB, where LnB is the electron diffusion length in the base and WB is the base width. (This diode represents the emitter–base diode of an n–p–n bipolar transistor.) We assume that vBE (t) consists of a small-signal voltage vbe (t) in series with a dc voltage VBE , i.e., vBE (t) = VBE + vbe (t). For simplicity, we assume parasitic resistances are negligible so that vBE (t) is the same as the emitter–base junction voltage. The current flows, including the displacement current, are shown schematically in Figure A6.1, where iE (t) is the emitter terminal current, iB (t) is the base terminal current, and CdBE,tot is the depletion-layer capacitance of the emitter–base junction. Overall charge neutrality or Kirchoff’s law requires that

iE(t) + iB(t) = 0.