Fundamentals of Modern VLSI Devices

The previous chapters have considered the operation of CMOS and bipolar devices mainly in the context of logic circuits. This chapter addresses another basic functional block in modern VLSI chips – memory. A predominant majority of the VLSI devices produced today are in various forms of random-access memory (RAM).

Viewed from the operation standpoint, a RAM functional unit is usually organized into an array of memory cells (or bits) together with its supporting circuits for selecting, writing, and reading the memory cells. In an array, the bits on the same row are selected by a word signal. A schematic block diagram of a RAM unit is shown in Fig. 9.1. The array consists of W words with B bits each, for a total memory capacity of W × B bits. A random bit in the array can be accessed through signals applied to its wordline and bitline.

Depending on the retention of information in the cells of a memory array, random-access memories can be classified into three categories: static random-access memory (SRAM), dynamic random-access memory (DRAM), and nonvolatile random-access memory (NVRAM). NVRAM is often referred to as nonvolatile memory for short. SRAMs have fast access times. They retain data as long as they are connected to the power supply. Practically every VLSI chip contains a certain amount of SRAM which is usually built using basically the same devices as in the logic circuits. DRAMs have relatively slow access times. They require periodic refresh in order to prevent loss of data. On a per-bit basis, DRAMs have a much lower cost than SRAMs because a DRAM cell is typically only about one tenth the size of an SRAM cell. For systems that require much more SRAM than can be contained on the logic chip, stand-alone SRAM chips are often used to meet the need. However, in order to reduce system cost and size, designers often use stand-alone DRAM chips instead of stand-alone SRAM chips. In that case, some form of memory-hierarchy architecture is usually employed to minimize the impact of the relatively slow DRAM on the system performance. Both SRAMs and DRAMs are volatile in that data are lost once the power supply to the chip is disconnected.