When a power semiconductor switch is either onor off, its power dissipation is relatively small.However, the transition from one state to theother is often not so benign, and can imposesimultaneous high voltage and high current on theswitching device. Special efforts are oftenrequired to ensure that the device will survivethis most stressful part of its operating cycle.We have already seen in Fig. 22.4(b) how a snubbercircuit consisting ofCs andRs can moderatethe effects of parasitic inductance.
Review the options below to login to check your access.
Log in with your Cambridge Aspire website account to check access.
If you believe you should have access to this content, please contact your institutional librarian or consult our FAQ page for further information about accessing our content.