Integrated Circuit Fabrication Science and Technology

One of the main challenges in designing a front-end process for building a device is accurate control of the placement of the active doping regions. Understanding and controlling diffusion and annealing behavior are essential to obtaining the desired electrical characteristics. Consider a cross-section of a state-of-the-art MOS transistor and imagine what happens when it gets scaled down to smaller dimensions (Figure 7.1). In “ideal” or Dennard scaling, as described in Chapter 1, everything shrinks down linearly from one generation to the next. This means that not only do the lateral dimensions scale, but the vertical dimensions, such as the deep source/drain contacting junctions and the shallower tip or extension junctions, also scale. This maintains the same electric field patterns (assuming the operating voltage also scales proportionally). With the same ℰ-field patterns, the device operates in the same manner as before, except that the shorter channel length allows for faster switching speeds [1].