The major factors governing the performance of bipolar transistors in circuit applications are discussed in Chapter 11. Several of the commonly used figures of merit, namely, cutoff frequency, maximum oscillation frequency, and logic gate delay, are examined, and how a bipolar transistor can be optimized for a given figure of merit is discussed. Sections are devoted to examining the important delay components of a logic gate, and how these components can be minimized. The scaling properties of vertical bipolar transistors for high-speed digital logic circuits are discussed. A discussion of the optimization of bipolar transistors for RF and analog circuit applications is given. The chapter concludes with a discussion of the design tradeoff and optimization of symmetric lateral bipolar transistors for RF and analog circuit applications. Finally, several unique opportunities offered by symmetric lateral bipolar transistors, some of them beyond the capability of CMOS, are discussed.
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