Fundamentals of Modern VLSI Devices

This chapter begins by reviewing MOSFET scaling – the guiding principle for achieving density, speed, and power improvements in VLSI evolution. The implications of the non-scaling factors, specifically, thermal voltage and silicon bandgap, on the path of CMOS evolution are discussed. The rest of the chapter deals with the key factors that govern the switching performance and power dissipation of basic digital CMOS circuits. After a brief description of static CMOS logic gates, their layout, and noise margin, Section 8.3 considers the parasitic resistances and capacitances that may adversely affect the delay of a CMOS circuit. These include source and drain series resistance, junction capacitance, overlap capacitance, gate resistance, and interconnect capacitance and resistance. In Section 8.4, a delay equation is formulated and applied to study the sensitivity of CMOS delay to a variety of device and circuit parameters such as wire loading, device width and length, gate oxide thickness, power-supply voltage, threshold voltage, parasitic components, and substrate sensitivity in stacked circuits. The last section addresses the performance factors of MOSFETs in RF circuits, in particular, the unity-current-gain frequency and unity-power-gain frequency.