… they always purr. ‘If they would only purr for “yes” and mew for “no,” or any rule of that sort’ she had said, ‘so that one could keep up a conversation! But how can you talk with a person if they always say the same thing?’
On this occasion the kitten only purred: and it was impossible to guess whether it meant ‘yes’ or ‘no’.
—Lewis Carroll, Through the Looking-Glass, Chapter 12, 1871Test patterns enable testers to distinguish between a faulty circuit and a fault-free circuit. A test pattern is a bit sequence that we can apply at the input ports such that we are able to observe different responses for a faulty circuit and a fault-free circuit. In general, it is difficult to find a test pattern for a given fault manually. Therefore, given a fault model, we generate test patterns for a circuit using some electronic design automation (EDA) tools. The process of automatically finding a set of test patterns is called automatic test pattern generation (ATPG). In this chapter, we will discuss ATPG in detail.
REQUIREMENTS OF ATPG
In Chapter 21 (“Scan design”), we have seen that a given fault of a circuit can be detected using multiple test patterns. Moreover, a given test pattern can detect multiple faults in a circuit. Therefore, given a circuit and a set of faults, different ATPG tools can generate a different set of test patterns. We expect that a good ATPG tool will fulfill the following requirements:
1. Achieves a high fault coverage: As the fault coverage increases, the quality of testing improves, and the defect level decreases. Therefore, the set of test patterns generated by an ATPG tool should ideally cover all (100%) detectable faults for a given fault model. In practice, 98% –100% fault coverage is typically acceptable.
2. Generates a small test pattern set: The set of test patterns generated by an ATPG tool is applied to the device under test (DUT) using an automatic test equipment (ATE). Typically, test patterns and their responses are stored in the memory of the ATE and applied to the DUT during testing through some tester channels. For scan-based design, the test application time is directly proportional to the test set size. Therefore, to reduce the recurring cost of testing,
Review the options below to login to check your access.
Log in with your Cambridge Higher Education account to check access.
If you believe you should have access to this content, please contact your institutional librarian or consult our FAQ page for further information about accessing our content.