Introduction to VLSI Design Flow

Defects can creep into an IC while fabricating, despite tight process control and sophisticated fabrication technology. The primary purpose of testing is to detect such defects and prevent a defective IC from reaching the end-user.

Though testing is carried out primarily after fabrication, we must consider several aspects of testing during the design phase. We carry out some tasks during designing that simplify the testing process and make it economical. We collectively refer to test-driven design practices as Design For Testability (DFT). This part of the book covers essential aspects of DFT.

In Chapter 20, we will describe the basic concepts of DFT and structural testing. In Chapter 21, the scan design technique, the most popular implementation of structured testing, will be explained. In Chapter 22, a methodology to generate test patterns for the most common fault model, i.e., stuckat fault model, will be presented. Chapter 23 will describe the basic concepts of Built-in Self-Test (BIST), highlighting the advantages and disadvantages of self-testing. Before going through this part of the book, we suggest that readers become familiar with the basic testing concepts discussed in Chapter 6 (“Testing Techniques”).

It is worthy to point out that, in this book, we explain only the essential concepts and principles of testing. To gain further insight into IC testing, we advise readers to go through dedicated books on testing such as [1–4]. Further note that the focus area of this book is the testing of digital circuits. To understand design practices explicitly employed for testing of memories and analog/mixed-signal circuits, readers should refer to books such as [2–4].