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Chapter 23: Built-in Self-test

Chapter 23: Built-in Self-test

pp. 487-504

Authors

, Indraprastha Institute of Information Technology, Delhi
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Extract

I went in search of evil outside. I could not find any. Once I started searching my own heart, I found that none is as big evil as me.

—Kabir Das, 15th century (translated from vernacular Hindi)

In the previous chapters, we have discussed wafer-level testing that uses automatic test equipment (ATE). It allows a high degree of automation, achieves good fault coverage, and is cost-effective. Therefore, ATE-based testing is popular and widely adopted for industrial designs. However, ATEbased testing has the following drawbacks or limitations:

  • 1. It requires expensive ATE. Moreover, it requires sophisticated facilities equipped with an ATE. We cannot perform it outside the production testing environment. However, sometimes testing, diagnosis, and repair become necessary for a chip that is already integrated into a system.

  • 2. It employs voluminous test patterns that increase the test time and the cost of testing. Moreover, the number of test patterns increases with the advancement in technology due to increased circuit complexity. Consequently, the cost of testing increases with the advancement in technology.

  • 3. We cannot carry out at-speed testing for high-performance integrated circuits (ICs) due to the impedances associated with the probes of an ATE [1]. However, some types of faults, such as delay faults, can only be detected by at-speed tests [2]. It makes ATE-based techniques inadequate in some situations.

Built-in self-test (BIST) is another testing methodology that addresses the above drawbacks and has become quite popular [3–6]. In this chapter, we will discuss BIST in detail.

We can implement BIST in a design in many ways, depending on the design complexity, target test metrics, and allowed overheads. In this chapter, we describe a typical BIST system to elucidate its basic principles.

BASICS

BIST is a testing technique in which we incorporate additional hardware and software in a chip that enables it to self-test. During self-testing, an IC can test its own operation, both functionally and parametrically. The self-testing does not require an external test pattern. Thus, we eliminate the dependence on an ATE. It allows us to carry out BIST-based testing in the field and even after system integration. Additionally, we can perform at-speed testing because no external signal interfacing is required.

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